Li Yang, Wang Nan, Fan Li-Feng, Zhao Peng-Fei, Li Jin-Hai, Huang Lan, Wang Zhong-Yi
College of Information and Electrical Engineering, China Agricultural University, China.
School of Electronics, Peking University, China.
Heliyon. 2023 Apr 4;9(4):e15195. doi: 10.1016/j.heliyon.2023.e15195. eCollection 2023 Apr.
Electrical impedance tomography (EIT) has been used by researchers across several areas because of its low-cost and no-radiation properties. Researchers use complex conductivity in bioimpedance experiments to evaluate changes in various indicators within the image target. The diverse volumes and edges of biological tissues and the large impedance range impose dedicated demands on hardware design. The EIT hardware with a high signal-to-noise ratio (SNR), fast scanning and suitable for the impedance range of the image target is a fundamental foundation that EIT research needs to be equipped with. Understanding the characteristics of this technique and state-of-the-art design will accelerate the development of the robust system and provide a guidance for the superior performance of next-generation EIT. This review explores the hardware strategies for EIT proposed in the literature.
电阻抗断层成像（EIT）因其低成本和无辐射特性，已被多个领域的研究人员所采用。研究人员在生物阻抗实验中使用复电导率来评估图像目标内各种指标的变化。生物组织的体积和边缘各异，阻抗范围大，这对硬件设计提出了专门要求。具有高信噪比（SNR）、快速扫描且适用于图像目标阻抗范围的EIT硬件是EIT研究所需具备的基本基础。了解该技术的特性和最新设计将加速强大系统的开发，并为下一代EIT的卓越性能提供指导。本综述探讨了文献中提出的EIT硬件策略。
