Large-Scale Complementary Logic Circuit Enabled by AlO Passivation-Induced Carrier Polarity Modulation in Tungsten Diselenide.

Achieving effective polarity control of n- and p-type transistors based on two-dimensional (2D) materials is a critical challenge in the process of integrating transition metal dichalcogenides (TMDC) into complementary metal-oxide semiconductor (CMOS) logic circuits. Herein, we utilized a proficient and nondestructive method of electron-charge transfer to achieve a complete carrier polarity conversion from p-to n-type by depositing a thin layer of aluminum oxide (AlO) onto tungsten diselenide (WSe). By utilizing the AlO passivation layer, we observed precisely tuned n-type behavior in contrast to transistors fabricated on the as-grown WSe film without any passivation layer, which display prominent p-type behavior. The polarity-transformed n-type WSe transistor from the pristine p-type shows the maximum ON current of ∼0.1 μA accompanied by a high electron mobility of 7 cm V s at a drain voltage () of 1 V. We successfully showcased a homogeneous CMOS inverter utilizing 2D-TMDC which exhibits an impressive voltage gain of 7 at = 5 V. Moreover, this effective polarity control approach was further expanded upon to successfully demonstrate a range of logic circuits such as AND, OR, NAND, NOR logic gates, and SRAM. The proposed methodology possesses significant promise for facilitating the advancement of high-density circuitry components utilizing 2D-TMDC.