Daniel John, Sun Zheng, Zhang Xuejian, Tan Yuanqiu, Dilley Neil, Chen Zhihong, Appenzeller Joerg
Birck Nanotechnology Center, Purdue University, West Lafayette, IN, 47907, USA.
Department of Physics and Astronomy, Purdue University, West Lafayette, IN, 47907, USA.
Nat Commun. 2024 May 15;15(1):4098. doi: 10.1038/s41467-024-48152-0.
Probabilistic computing is a computing scheme that offers a more efficient approach than conventional complementary metal-oxide-semiconductor (CMOS)-based logic in a variety of applications ranging from optimization to Bayesian inference, and invertible Boolean logic. The probabilistic bit (or p-bit, the base unit of probabilistic computing) is a naturally fluctuating entity that requires tunable stochasticity; by coupling low-barrier stochastic magnetic tunnel junctions (MTJs) with a transistor circuit, a compact implementation is achieved. In this work, by combining stochastic MTJs with 2D-MoS field-effect transistors (FETs), we demonstrate an on-chip realization of a p-bit building block displaying voltage-controllable stochasticity. Supported by circuit simulations, we analyze the three transistor-one magnetic tunnel junction (3T-1MTJ) p-bit design, evaluating how the characteristics of each component influence the overall p-bit output. While the current approach has not reached the level of maturity required to compete with CMOS-compatible MTJ technology, the design rules presented in this work are valuable for future experimental implementations of scaled on-chip p-bit networks with reduced footprint.
概率计算是一种计算方案，在从优化到贝叶斯推理以及可逆布尔逻辑等各种应用中，它提供了一种比传统互补金属氧化物半导体（CMOS）逻辑更高效的方法。概率比特（或p比特，概率计算的基本单元）是一种自然波动的实体，需要可调的随机性；通过将低势垒随机磁隧道结（MTJ）与晶体管电路耦合，可以实现紧凑的实现方式。在这项工作中，通过将随机MTJ与二维MoS场效应晶体管（FET）相结合，我们展示了一个显示电压可控随机性的p比特构建模块的片上实现。在电路模拟的支持下，我们分析了三晶体管一磁隧道结（3T - 1MTJ）p比特设计，评估了每个组件的特性如何影响整体p比特输出。虽然目前的方法尚未达到与CMOS兼容的MTJ技术竞争所需的成熟水平，但这项工作中提出的设计规则对于未来缩小芯片面积的片上p比特网络的实验实现具有重要价值。
