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通过优化材料和电路设计,实现片上超导量子存储器中超越毫秒级的相干性。

Surpassing millisecond coherence in on chip superconducting quantum memories by optimizing materials and circuit design.

作者信息

Ganjam Suhas, Wang Yanhao, Lu Yao, Banerjee Archan, Lei Chan U, Krayzman Lev, Kisslinger Kim, Zhou Chenyu, Li Ruoshui, Jia Yichen, Liu Mingzhao, Frunzio Luigi, Schoelkopf Robert J

机构信息

Departments of Applied Physics and Physics, Yale University, New Haven, 06511, CT, USA.

Yale Quantum Institute, Yale University, New Haven, 06511, CT, USA.

出版信息

Nat Commun. 2024 May 1;15(1):3687. doi: 10.1038/s41467-024-47857-6.

DOI:10.1038/s41467-024-47857-6
PMID:38693124
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC11063213/
Abstract

The performance of superconducting quantum circuits for quantum computing has advanced tremendously in recent decades; however, a comprehensive understanding of relaxation mechanisms does not yet exist. In this work, we utilize a multimode approach to characterizing energy losses in superconducting quantum circuits, with the goals of predicting device performance and improving coherence through materials, process, and circuit design optimization. Using this approach, we measure significant reductions in surface and bulk dielectric losses by employing a tantalum-based materials platform and annealed sapphire substrates. With this knowledge we predict the relaxation times of aluminum- and tantalum-based transmon qubits, and find that they are consistent with experimental results. We additionally optimize device geometry to maximize coherence within a coaxial tunnel architecture, and realize on-chip quantum memories with single-photon Ramsey times of 2.0 - 2.7 ms, limited by their energy relaxation times of 1.0 - 1.4 ms. These results demonstrate an advancement towards a more modular and compact coaxial circuit architecture for bosonic qubits with reproducibly high coherence.

摘要

近几十年来,用于量子计算的超导量子电路性能有了巨大提升;然而,目前对弛豫机制仍缺乏全面的理解。在这项工作中,我们采用多模方法来表征超导量子电路中的能量损耗,目标是通过材料、工艺和电路设计优化来预测器件性能并提高相干性。利用这种方法,我们通过采用基于钽的材料平台和退火蓝宝石衬底,测量到表面和体介电损耗显著降低。基于这些认识,我们预测了基于铝和钽的跨导量子比特的弛豫时间,发现它们与实验结果一致。我们还优化了器件几何结构,以在同轴隧道架构内实现最大相干性,并实现了单光子拉姆齐时间为2.0 - 2.7毫秒的片上量子存储器,其受限于1.0 - 1.4毫秒的能量弛豫时间。这些结果表明,朝着具有可重复高相干性的玻色子量子比特的更模块化、更紧凑的同轴电路架构迈进了一步。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/1073f19a2d7e/41467_2024_47857_Fig6_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/037f56e205a1/41467_2024_47857_Fig1_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/63b027f9a309/41467_2024_47857_Fig2_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/c46201e4535b/41467_2024_47857_Fig3_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/12286c5aed97/41467_2024_47857_Fig4_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/64ce3ea6e586/41467_2024_47857_Fig5_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/1073f19a2d7e/41467_2024_47857_Fig6_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/037f56e205a1/41467_2024_47857_Fig1_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/63b027f9a309/41467_2024_47857_Fig2_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/c46201e4535b/41467_2024_47857_Fig3_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/12286c5aed97/41467_2024_47857_Fig4_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/64ce3ea6e586/41467_2024_47857_Fig5_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/82cc/11063213/1073f19a2d7e/41467_2024_47857_Fig6_HTML.jpg

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