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高效设计与近似 FA、FS、FA/S 电路在量子点计算机中的纳米计算实现

Efficient design and implementation of approximate FA, FS, and FA/S circuits for nanocomputing in QCA.

机构信息

Department of Computer Engineering, Faculty of Engineering, Bu-Ali Sina University, Hamedan, Iran.

出版信息

PLoS One. 2024 Sep 6;19(9):e0310050. doi: 10.1371/journal.pone.0310050. eCollection 2024.

DOI:10.1371/journal.pone.0310050
PMID:39241012
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC11379381/
Abstract

Recently, there has been a lot of research in Quantum Cellular Automata (QCA) technology because it promises low power consumption, low complexity, low latency, and compact space. Simultaneously, approximate arithmetic, a new paradigm in computing, streamlines the computational process and emerges as a low-power, high-performance design approach for arithmetic circuits. Furthermore, the XOR gate has been widely used in digital design and is a basic building block that can be used in many upcoming technologies. The full adder (FA) circuit is a key component of QCA technology and is utilized in arithmetic logic operations including subtraction, multiplication, and division. A great deal of research has been done on the design of approximate FA, full subtractor (FS), full adder/subtractor (FA/S), and 4-bit ripple carry adder (RCA) based on XOR logic, establishing them as essential components in the creation of QCA-based arithmetic circuits. This study presents three new and effective QCA-based circuits, based on XOR logic: an approximate FA, an approximate FS, an approximate FA/S, and an approximate 4-bit ripple carry adder (RCA). Interestingly, some designs have inputs on one side and outputs on the other, making it easier to reach the components without being encircled by other cells and leading to a more effective circuit design. In particular, a delay of 0.5 clock phases, an area of 0.01 μm2, and implementation utilizing just 11 cells was accomplished in the approximate FA and subtractor designs. In a similar vein, the estimated FA/S designs showed 0.5 clock phase delay, 0.01 μm2 area, and 12 cells used for implementation. An approximate 4-bit RCA is proposed using 64 QCA cells. The effectiveness of these designs is evaluated through functional verification with the QCADesigner program. According to simulation results, these proposed solutions not only function well but significantly outperform previous ideas in terms of speed and space. The proposed FA, FS, and RCA designs surpassed the previous best designs by 21%, 21%, and 43%, respectively, in terms of cell count.

摘要

最近,量子细胞自动机(QCA)技术的研究非常多,因为它有望实现低功耗、低复杂度、低延迟和紧凑的空间。同时,近似算法作为计算领域的一种新范式,简化了计算过程,成为了一种适用于算术电路的低功耗、高性能设计方法。此外,异或门在数字设计中得到了广泛的应用,是一种基本的构建块,可以应用于许多新兴技术中。全加器(FA)电路是 QCA 技术的关键组成部分,用于包括减法、乘法和除法在内的算术逻辑运算。基于 XOR 逻辑的近似 FA、全减器(FS)、全加器/减器(FA/S)和 4 位行波进位加法器(RCA)的设计已经进行了大量的研究,它们成为了基于 QCA 的算术电路设计的基本组成部分。本研究提出了三种基于 XOR 逻辑的新型有效的 QCA 电路:近似 FA、近似 FS、近似 FA/S 和近似 4 位行波进位加法器(RCA)。有趣的是,一些设计的输入在一侧,输出在另一侧,这使得在不被其他单元包围的情况下更容易到达这些单元,从而实现更有效的电路设计。特别是,在近似 FA 和减法器的设计中,实现了 0.5 个时钟相位的延迟、0.01μm2 的面积和仅使用 11 个单元。类似地,估计的 FA/S 设计的延迟为 0.5 个时钟相位,面积为 0.01μm2,使用 12 个单元实现。提出了一种使用 64 个 QCA 单元的近似 4 位 RCA。使用 QCADesigner 程序进行功能验证评估了这些设计的有效性。根据仿真结果,这些提出的解决方案不仅功能良好,而且在速度和空间方面明显优于以前的想法。所提出的 FA、FS 和 RCA 设计在单元数方面分别比以前的最佳设计提高了 21%、21%和 43%。

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