Ishibashi Mio, Kawaguchi Masashi, Hibino Yuki, Yakushiji Kay, Tsukamoto Arata, Nakatsuji Satoru, Hayashi Masamitsu
Department of Physics, The University of Tokyo, Tokyo 113-0033, Japan.
National Institute of Advanced Industrial Science and Technology (AIST), Ibaraki 305-8568, Japan.
Sci Adv. 2024 Oct 25;10(43):eadq0898. doi: 10.1126/sciadv.adq0898. Epub 2024 Oct 23.
Current-driven motion of magnetic domain walls is one of the key technologies for developing storage class memory devices. Extensive studies have revealed a variety of material systems that exhibit high-speed and/or lower power propagation of the domain walls driven by electric current. However, few studies have assessed the reliability of the operations of the memory technology. Here, we decode the errors associated with writing and shifting domain walls using nanosecond current pulses in a ~5-micrometer-wide wire composed of a Pt/GdFeCo bilayer. We find that writing a domain wall at the edge of the wire causes a bit positioning error of ~0.3 micrometers, whereas the shifting process induces an error of ~0.1 micrometers per a 2-nanosecond-long current pulse. The error correlation among successive shifting is negligible when the current drive is sufficiently large. These features allow reliable operation of highly packed domain walls in a ferrimagnetic racetrack.
磁畴壁的电流驱动运动是开发存储类存储设备的关键技术之一。大量研究已经揭示了多种材料系统，这些系统在电流驱动下表现出磁畴壁的高速和/或低功耗传播。然而，很少有研究评估这种存储技术操作的可靠性。在此，我们在由Pt/GdFeCo双层组成的约5微米宽的导线中，使用纳秒电流脉冲来解码与写入和移动磁畴壁相关的误差。我们发现，在导线边缘写入磁畴壁会导致约0.3微米的位定位误差，而移动过程中每2纳秒长的电流脉冲会引起约0.1微米的误差。当电流驱动足够大时，连续移动之间的误差相关性可以忽略不计。这些特性使得铁磁赛道中高度密集的磁畴壁能够可靠运行。
