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基于铁电混合相界晶体管的模拟储层计算。

Analog reservoir computing via ferroelectric mixed phase boundary transistors.

作者信息

Kim Jangsaeng, Park Eun Chan, Shin Wonjun, Koo Ryun-Han, Han Chang-Hyeon, Kang He Young, Yang Tae Gyu, Goh Youngin, Lee Kilho, Ha Daewon, Cheema Suraj S, Jeong Jae Kyeong, Kwon Daewoong

机构信息

Department of Electronic Engineering, Hanyang University, Seoul, 04763, Republic of Korea.

Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, MA, 02139, USA.

出版信息

Nat Commun. 2024 Oct 23;15(1):9147. doi: 10.1038/s41467-024-53321-2.

Abstract

Analog reservoir computing (ARC) systems have attracted attention owing to their efficiency in processing temporal information. However, the distinct functionalities of the system components pose challenges for hardware implementation. Herein, we report a fully integrated ARC system that leverages material versatility of the ferroelectric-to-mixed phase boundary (MPB) hafnium zirconium oxides integrated onto indium-gallium-zinc oxide thin-film transistors (TFTs). MPB-based TFTs (MPBTFTs) with nonlinear short-term memory characteristics are utilized for physical reservoirs and artificial neuron, while nonvolatile ferroelectric TFTs mimic synaptic behavior for readout networks. Furthermore, double-gate configuration of MPBTFTs enhances reservoir state differentiation and state expansion for physical reservoir and processes both excitatory and inhibitory pulses for neuronal functionality with minimal hardware burden. The seamless integration of ARC components on a single wafer executes complex real-world time-series predictions with a low normalized root mean squared error of 0.28. The material-device co-optimization proposed in this study paves the way for the development of area- and energy-efficient ARC systems.

摘要

模拟储层计算(ARC)系统因其在处理时间信息方面的效率而备受关注。然而,系统组件的独特功能给硬件实现带来了挑战。在此,我们报告了一种完全集成的ARC系统,该系统利用集成在铟镓锌氧化物薄膜晶体管(TFT)上的铁电至混合相界(MPB)铪锆氧化物的材料多功能性。具有非线性短期记忆特性的基于MPB的TFT(MPBTFT)用于物理储层和人工神经元,而非易失性铁电TFT模拟读出网络的突触行为。此外,MPBTFT的双栅配置增强了物理储层的储层状态区分和状态扩展,并以最小的硬件负担处理神经元功能的兴奋性和抑制性脉冲。ARC组件在单个晶圆上的无缝集成以0.28的低归一化均方根误差执行复杂的现实世界时间序列预测。本研究中提出的材料-器件协同优化为开发面积和能源高效的ARC系统铺平了道路。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/52ba/11499988/dfc21ce65e1c/41467_2024_53321_Fig1_HTML.jpg

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