Si Mengwei, Andler Joseph, Lyu Xiao, Niu Chang, Datta Suman, Agrawal Rakesh, Ye Peide D
School of Electrical and Computer Engineering and Birck Nanotechnology Center, Purdue University, West Lafayette, Indiana 47907, United States.
School of Materials Engineering, Purdue University, West Lafayette, Indiana 47907, United States.
ACS Nano. 2020 Sep 22;14(9):11542-11547. doi: 10.1021/acsnano.0c03978. Epub 2020 Aug 26.
In this work, we demonstrate high-performance indium-tin-oxide (ITO) transistors with a channel thickness down to 1 nm and ferroelectric HfZrO as gate dielectric. An on-current of 0.243 A/mm is achieved on submicron gate-length ITO transistors with a channel thickness of 1 nm, while it increases to as high as 1.06 A/mm when the channel thickness increases to 2 nm. A raised source/drain structure with a thickness of 10 nm is employed, contributing to a low contact resistance of 0.15 Ω·mm and a low contact resistivity of 1.1 × 10 Ω·cm. The ITO transistor with a recessed channel and ferroelectric gating demonstrates several advantages over 2D semiconductor transistors and other thin-film transistors, including large-area wafer-size nanometer thin-film formation, low contact resistance and contact resistivity, an atomic thin channel being immune to short channel effects, large gate modulation of high carrier density by ferroelectric gating, high-quality gate dielectric and passivation formation, and a large bandgap for the low-power back-end-of-line complementary metal-oxide-semiconductor application.
在这项工作中，我们展示了沟道厚度低至1纳米且以铁电HfZrO作为栅极电介质的高性能铟锡氧化物（ITO）晶体管。在沟道厚度为1纳米的亚微米栅长ITO晶体管上实现了0.243 A/mm的导通电流，而当沟道厚度增加到2纳米时，该电流增加到高达1.06 A/mm。采用了厚度为10纳米的凸起源极/漏极结构，有助于实现0.15Ω·mm的低接触电阻和1.1×10Ω·cm的低接触电阻率。具有凹陷沟道和铁电栅控的ITO晶体管相对于二维半导体晶体管和其他薄膜晶体管具有多个优势，包括大面积晶圆尺寸纳米薄膜形成、低接触电阻和接触电阻率、原子级薄沟道不受短沟道效应影响、通过铁电栅控对高载流子密度进行大的栅极调制、高质量栅极电介质和钝化形成，以及适用于低功耗后端互补金属氧化物半导体应用的大带隙。
