Qiu Yihang, Wei Li
College of Information and Control Engineering, Jilin Institute of Chemical Technology, Jilin, 132022, China.
College of Physics and Electronic Information, Baicheng Normal University, Jilin, 137000, China.
Sci Rep. 2025 Jan 2;15(1):206. doi: 10.1038/s41598-024-84007-w.
An innovative GaN trench MOSFET featuring an ultra-low gate-drain charge (Q) is proposed, with its operational mechanisms thoroughly investigated using TCAD simulations. This novel MOSFET design introduces a triple-shield structure (BPSG-MOS) comprising three critical components: (1) a grounded split gate (SG), (2) a P+ shield region (PSR), and (3) a semi-wrapped BP layer that extends the P-shield beneath the gate and along the sidewalls of the trench gate. Both the SG and PSR effectively reduce gate-drain coupling, transforming most of the gate-drain capacitance (C) into a series combination of gate-source capacitance (C) and drain-source capacitance (C). Furthermore, the BP layer refines the gate-drain capacitance by converting the C at the trench gate sidewalls into C. This configuration significantly lowers C, resulting in an ultra-low Q. Compared to the dual-shield MOSFET (PSGT-MOS) and the conventional trench MOSFET (TG-MOS), the BPSG-MOS achieves reductions in C by 81% and 98%, respectively.
提出了一种具有超低栅漏电荷（Q）的创新型氮化镓沟槽金属氧化物半导体场效应晶体管（MOSFET），并使用TCAD模拟对其工作机制进行了深入研究。这种新型MOSFET设计引入了一种三屏蔽结构（BPSG-MOS），它由三个关键组件组成：（1）一个接地的分裂栅极（SG），（2）一个P+屏蔽区域（PSR），以及（3）一个半包裹的BP层，该层在栅极下方并沿沟槽栅极的侧壁延伸P屏蔽。SG和PSR都有效地降低了栅漏耦合，将大部分栅漏电容（C）转换为栅源电容（C）和漏源电容（C）的串联组合。此外，BP层通过将沟槽栅极侧壁处的C转换为C来优化栅漏电容。这种配置显著降低了C，从而实现了超低的Q。与双屏蔽MOSFET（PSGT-MOS）和传统沟槽MOSFET（TG-MOS）相比，BPSG-MOS的C分别降低了81%和98%。
