Dou Cunhua, Song Weijia, Yan Yu, Zhang Xuan, Tang Zhiyu, Zhao Xing, Liu Fanyu, Xue Shujian, Sun Huabin, Wan Jing, Li Binhong, Wang Yun, Ye Tianchun, Xu Yong, Cristoloveanu Sorin
Guangdong Greater Bay Area Institute of Integrated Circuit and System, Guangzhou 510300, China.
School of Integrated Circuit Science and Engineering, Nanjing University of Posts and Telecommunications, Nanjing 210003, China.
Micromachines (Basel). 2025 Mar 31;16(4):418. doi: 10.3390/mi16040418.
The core-shell junctionless MOSFET (CS-JL FET) meets the process requirements of FD-SOI technology. The transistor body comprises a heavily doped ultrathin layer (core linking the source and the drain), located underneath an undoped layer (shell). Drain current, transconductance, and capacitance characteristics demonstrate striking performance improvement compared with conventional junctionless MOSFETs. The addition of the shell results in one order of magnitude higher mobility (peak value), transconductance, and drive current. The doping and thickness of the core can be engineered to achieve a positive threshold voltage for normally-off operation. The CS-JL FET is compatible with back-biasing and downscaling schemes. The physical mechanisms are revealed by emphasizing the roles of the main device parameters.
核心-壳层无结金属氧化物半导体场效应晶体管（CS-JL FET）满足了全耗尽绝缘体上硅（FD-SOI）技术的工艺要求。晶体管主体包括一个重掺杂超薄层（连接源极和漏极的核心），位于一个未掺杂层（壳层）之下。与传统的无结金属氧化物半导体场效应晶体管相比，漏极电流、跨导和电容特性显示出显著的性能提升。壳层的加入使迁移率（峰值）、跨导和驱动电流提高了一个数量级。可以通过设计核心的掺杂和厚度来实现常开操作的正阈值电压。CS-JL FET与背偏置和按比例缩小方案兼容。通过强调主要器件参数的作用揭示了其物理机制。
