University of Minnesota, Electrical Engineering Room 4-178, 200 Union Street SE, Minneapolis, MN 55455, USA.
Proc Natl Acad Sci U S A. 2010 Jan 19;107(3):993-8. doi: 10.1073/pnas.0909482107. Epub 2010 Jan 11.
This paper introduces a method for self-assembling and electrically connecting small (20-60 micrometer) semiconductor chiplets at predetermined locations on flexible substrates with high speed (62500 chips/45 s), accuracy (0.9 micrometer, 0.14 degrees), and yield (> 98%). The process takes place at the triple interface between silicone oil, water, and a penetrating solder-patterned substrate. The assembly is driven by a stepwise reduction of interfacial free energy where chips are first collected and preoriented at an oil-water interface before they assemble on a solder-patterned substrate that is pulled through the interface. Patterned transfer occurs in a progressing linear front as the liquid layers recede. The process eliminates the dependency on gravity and sedimentation of prior methods, thereby extending the minimal chip size to the sub-100 micrometer scale. It provides a new route for the field of printable electronics to enable the integration of microscopic high performance inorganic semiconductors on foreign substrates with the freedom to choose target location, pitch, and integration density. As an example we demonstrate a fault-tolerant segmented flexible monocrystalline silicon solar cell, reducing the amount of Si that is used when compared to conventional rigid cells.
本文介绍了一种在柔性基板上的预定位置上,以高速(62500 个/45 秒)、高精度(0.9 微米,0.14 度)和高成品率(>98%)将小尺寸(20-60 微米)半导体芯片自组装并电连接的方法。该过程发生在硅油、水和穿透式焊膏图案化基板的三相界面处。组装是通过逐步降低界面自由能来驱动的,其中芯片首先在油水界面处收集和预定向,然后在通过界面拉动的焊膏图案化基板上组装。随着液层的退去,图案转移以渐进的线性前沿进行。该过程消除了对先前方法中重力和沉降的依赖,从而将最小芯片尺寸扩展到亚 100 微米的规模。它为可印刷电子领域提供了一条新途径,使微小的高性能无机半导体能够集成到外国基板上,并可自由选择目标位置、间距和集成密度。例如,我们展示了一种容错分段式柔性单晶硅太阳能电池,与传统刚性电池相比,减少了硅的使用量。