Zheng Xuezhe, Lexau Jon, Luo Ying, Thacker Hiren, Pinguet Thierry, Mekis Attila, Li Guoliang, Shi Jing, Amberg Philip, Pinckney Nathaniel, Raj Kannan, Ho Ron, Cunningham John E, Krishnamoorthy Ashok V
Sun Microsystems Physical Sciences Center, San Diego, CA 92121, USA.
Opt Express. 2010 Feb 1;18(3):3059-70. doi: 10.1364/OE.18.003059.
We report the first sub-picojoule per bit (400fJ/bit) operation of a silicon modulator intimately integrated with a driver circuit and embedded in a clocked digital transmitter. We show a wall-plug power efficiency below 400microW/Gbps for a 130nm SOI CMOS carrier-depletion ring modulator flip-chip integrated to a 90nm bulk Si CMOS driver circuit. We also demonstrate stable error-free transmission of over 1.5 petabits of data at 5Gbps over 3.5 days using the integrated modulator without closed-loop ring resonance tuning. Small signal measurements of the CMOS ring modulator, sans circuit, showed a 3dB bandwidth in excess of 15GHz at 1V of reverse bias, indicating that further increases in transmission rate and reductions of energy-per-bit is possible while retaining compatibility with CMOS drive voltages.
我们报道了一种与驱动电路紧密集成并嵌入时钟数字发射机的硅调制器首次实现了每比特低于皮焦耳（400飞焦/比特）的运行。对于倒装芯片集成到90nm体硅CMOS驱动电路的130nm SOI CMOS载流子耗尽型环形调制器，我们展示了低于400微瓦/吉比特的壁插式功率效率。我们还演示了使用该集成调制器在无闭环环形谐振调谐的情况下，在3.5天内以5Gbps的速率稳定无误地传输超过1.5拍比特的数据。对无电路的CMOS环形调制器进行的小信号测量表明，在1V反向偏置下，3dB带宽超过15GHz，这表明在保持与CMOS驱动电压兼容性的同时，进一步提高传输速率和降低每比特能量是可能的。
