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零偏置先进 CMOS 中的耗尽型载流子等离子体光调制器。

Depletion-mode carrier-plasma optical modulator in zero-change advanced CMOS.

机构信息

Department of Electrical, Computer and Energy Engineering, University of Colorado, Boulder, Colorado 80309, USA.

出版信息

Opt Lett. 2013 Aug 1;38(15):2657-9. doi: 10.1364/OL.38.002657.

Abstract

We demonstrate the first (to the best of our knowledge) depletion-mode carrier-plasma optical modulator fabricated in a standard advanced complementary metal-oxide-semiconductor (CMOS) logic process (45 nm node SOI CMOS) with no process modifications. The zero-change CMOS photonics approach enables this device to be monolithically integrated into state-of-the-art microprocessors and advanced electronics. Because these processes support lateral p-n junctions but not efficient ridge waveguides, we accommodate these constraints with a new type of resonant modulator. It is based on a hybrid microring/disk cavity formed entirely in the sub-90 nm thick monocrystalline silicon transistor body layer. Electrical contact of both polarities is made along the inner radius of the multimode ring cavity via an array of silicon spokes. The spokes connect to p and n regions formed using transistor well implants, which form radially extending lateral junctions that provide index modulation. We show 5 Gbps data modulation at 1265 nm wavelength with 5.2 dB extinction ratio and an estimated 40 fJ/bit energy consumption. Broad thermal tuning is demonstrated across 3.2 THz (18 nm) with an efficiency of 291 GHz/mW. A single postprocessing step to remove the silicon handle wafer was necessary to support low-loss optical confinement in the device layer. This modulator is an important step toward monolithically integrated CMOS photonic interconnects.

摘要

我们展示了首个(据我们所知)在标准先进互补金属氧化物半导体(CMOS)逻辑工艺(45nm 节点 SOI CMOS)中制造的耗尽型载流子等离子体光调制器,无需进行任何工艺修改。零变更 CMOS 光子学方法使该器件能够单片集成到最先进的微处理器和先进的电子设备中。由于这些工艺支持横向 p-n 结,但不支持高效脊形波导,我们通过一种新型谐振调制器来适应这些限制。它基于完全在亚 90nm 厚单晶硅晶体管体层中形成的混合微环/盘腔。通过数组硅辐条在多模环形腔的内半径上进行两种极性的电接触。辐条连接到使用晶体管阱注入形成的 p 和 n 区域,这些区域形成径向延伸的横向结,提供指数调制。我们在 1265nm 波长下展示了 5Gbps 数据调制,消光比为 5.2dB,估计能耗为 40fJ/bit。在 3.2THz(18nm)范围内实现了宽热调谐,效率为 291GHz/mW。需要进行单个后处理步骤来去除硅处理晶片,以在器件层中支持低损耗光限制。这种调制器是朝着单片集成 CMOS 光子学互连迈出的重要一步。

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