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镍/氧化镍核壳纳米线中的忆阻和阈值电阻开关。

Memory and threshold resistance switching in Ni/NiO core-shell nanowires.

机构信息

State Key Laboratory for Mesoscopic Physics, Department of Physics, Peking University, Beijing 100871, People's Republic of China.

出版信息

Nano Lett. 2011 Nov 9;11(11):4601-6. doi: 10.1021/nl202017k. Epub 2011 Oct 13.

DOI:10.1021/nl202017k
PMID:21985530
Abstract

We report on the first controlled alternation between memory and threshold resistance switching (RS) in single Ni/NiO core-shell nanowires by setting the compliance current (I(CC)) at room temperature. The memory RS is triggered by a high I(CC), while the threshold RS appears by setting a low I(CC), and the Reset process is achieved without setting a I(CC). In combination with first-principles calculations, the physical mechanisms for the memory and threshold RS are fully discussed and attributed to the formation of an oxygen vacancy (Vo) chain conductive filament and the electrical field induced breakdown without forming a conductive filament, respectively. Migration of oxygen vacancies can be activated by appropriate Joule heating, and it is energetically favorable to form conductive chains rather than random distributions due to the Vo-Vo interaction, which results in the nonvolatile switching from the off- to the on-state. For the Reset process, large Joule heating reorders the oxygen vacancies by breaking the Vo-Vo interactions and thus rupturing the conductive filaments, which are responsible for the switching from on- to off-states. This deeper understanding of the driving mechanisms responsible for the threshold and memory RS provides guidelines for the scaling, reliability, and reproducibility of NiO-based nonvolatile memory devices.

摘要

我们报告了首例通过室温下设置合规电流(I(CC)),在单个 Ni/NiO 核壳纳米线中实现记忆和阈电阻开关(RS)交替的控制实验。高 I(CC)触发记忆 RS,而低 I(CC)则产生阈 RS,且无需设置 I(CC)即可实现 Reset 过程。结合第一性原理计算,我们全面讨论了记忆和阈 RS 的物理机制,并将其归因于氧空位(Vo)链导电细丝的形成和电场诱导的无导电细丝击穿,分别。氧空位的迁移可以通过适当的焦耳加热来激活,由于 Vo-Vo 相互作用,形成导电链而不是随机分布在能量上是有利的,这导致了从非易失性关态到开态的转变。对于 Reset 过程,较大的焦耳加热通过破坏 Vo-Vo 相互作用来重新排列氧空位,从而破坏导电细丝,这是导致从开态到关态转变的原因。对阈和记忆 RS 的驱动机制的更深入理解为基于 NiO 的非易失性存储器件的缩放、可靠性和可重复性提供了指导。

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