Optimising apodized grating couplers in a pure SOI platform to -0.5 dB coupling efficiency.

We present a theoretical optimisation of 1D apodized grating couplers in a "pure" Silicon-On-Insulator (SOI) architecture, i.e. without any bottom reflector element, by means of a general mutative method. We perform a comprehensive 2D Finite Difference Time Domain study of chirped and apodized grating couplers in 220 nm SOI, and demonstrate that the global maximum coupling efficiency in that platform is capped to 65% (-1.9 dB). Moving to designs with thicker Si-layers, we identify a new record design in 340 nm SOI, with a simulated coupling efficiency of 89% (-0.5 dB). Going to thicker Si layers does not further improve the efficiency, implying that -0.5 dB may be a global maximum for a grating coupler in SOI without a bottom-reflector. Even after allowing for 193 nm UV-lithographic fabrication constraints, the 340 nm design still offers -0.7 dB efficiency. These new apodized designs are the first pure SOI couplers compatible with deep-UV lithography to offer better than -1 dB insertion losses. With only very minor changes to existing deposition and lithography recipes, they are compatible with the multi-project wafer runs already offered by Si-Photonics foundries.