Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, 1-1 Hibarigaoka, Tempaku-cho, Toyohashi, Aichi 441-8580, Japan.
Sensors (Basel). 2018 Jan 11;18(1):184. doi: 10.3390/s18010184.
A time-domain analog spatial compressed sensing encoder for neural recording applications is proposed. Owing to the advantage of MEMS technologies, the number of channels on a silicon neural probe array has doubled in 7.4 years, and therefore, a greater number of recording channels and higher density of front-end circuitry is required. Since neural signals such as action potential (AP) have wider signal bandwidth than that of an image sensor, a data compression technique is essentially required for arrayed neural recording systems. In this paper, compressed sensing (CS) is employed for data reduction, and a novel time-domain analog CS encoder is proposed. A simpler and lower power circuit than conventional analog or digital CS encoders can be realized by using the proposed CS encoder. A prototype of the proposed encoder was fabricated in a 180 nm 1P6M CMOS process, and it achieved an active area of 0.0342 mm 2 / ch . and an energy efficiency of 25.0 pJ / ch . · conv .
提出了一种用于神经记录应用的时域模拟空间压缩感知编码器。由于 MEMS 技术的优势，硅神经探针阵列上的通道数量在 7.4 年内翻了一番，因此需要更多的记录通道和更高密度的前端电路。由于动作电位 (AP) 等神经信号的信号带宽比图像传感器宽，因此阵列式神经记录系统本质上需要数据压缩技术。在本文中，压缩感知 (CS) 用于数据缩减，并提出了一种新颖的时域模拟 CS 编码器。通过使用所提出的 CS 编码器，可以实现比传统模拟或数字 CS 编码器更简单、更低功耗的电路。所提出的编码器的原型是在 180nm 1P6M CMOS 工艺中制造的，它实现了 0.0342mm 2 / ch 的有效面积和 25.0pJ / ch 的能量效率。
