National Institute of Standards and Technology, 100 Bureau Dr., Gaithersburg, Maryland 20899, USA.
Nanoscale. 2018 Mar 1;10(9):4488-4499. doi: 10.1039/c7nr07777g.
Advanced hydrogen lithography techniques and low-temperature epitaxial overgrowth enable the patterning of highly phosphorus-doped silicon (Si:P) monolayers (ML) with atomic precision. This approach to device fabrication has made Si:P monolayer systems a testbed for multiqubit quantum computing architectures and atomically precise 2-D superlattice designs whose behaviors are directly tied to the deterministic placement of single dopants. However, dopant segregation, diffusion, surface roughening, and defect formation during the encapsulation overgrowth introduce large uncertainties to the exact dopant placement and activation ratio. In this study, we develop a unique method by combining dopant segregation/diffusion models with sputter profiling simulation to monitor and control, at the atomic scale, dopant movement using room-temperature grown locking layers (LLs). We explore the impact of LL growth rate, thickness, rapid thermal annealing, surface accumulation, and growth front roughness on dopant confinement, local crystalline quality, and electrical activation within Si:P 2-D systems. We demonstrate that dopant movement can be more efficiently suppressed by increasing the LL growth rate than by increasing the LL thickness. We find that the dopant segregation length can be suppressed below a single Si lattice constant by increasing the LL growth rates at room temperature while maintaining epitaxy. Although dopant diffusivity within the LL is found to remain high (on the order of 10 cm s) even below the hydrogen desorption temperature, we demonstrate that exceptionally sharp dopant confinement with high electrical quality within Si:P monolayers can be achieved by combining a high LL growth rate with low-temperature LL rapid thermal annealing. The method developed in this study provides a key tool for 2-D fabrication techniques that require precise dopant placement to suppress, quantify, and predict a single dopant's movement at the atomic scale.
先进的氢刻蚀技术和低温外延过生长技术使得高度磷掺杂硅(Si:P)单层(ML)能够以原子精度进行图案化。这种器件制造方法使 Si:P 单层系统成为多量子比特量子计算架构和原子精确二维超晶格设计的测试平台,其行为直接与单个掺杂剂的确定性位置有关。然而,在封装过生长过程中,掺杂剂的分凝、扩散、表面粗化和缺陷形成会给掺杂剂的精确位置和激活比带来很大的不确定性。在这项研究中,我们开发了一种独特的方法,通过将掺杂剂分凝/扩散模型与溅射剖面模拟相结合,使用室温生长的锁定层(LL)在原子尺度上监测和控制掺杂剂的运动。我们探索了 LL 生长速率、厚度、快速热退火、表面积累和生长前沿粗糙度对 Si:P 二维系统中掺杂剂限制、局部晶体质量和电激活的影响。我们证明,通过增加 LL 生长速率比增加 LL 厚度更有效地抑制掺杂剂的移动。我们发现,通过在室温下增加 LL 生长速率,可以将掺杂剂分凝长度抑制到单个硅晶格常数以下,同时保持外延。尽管在低于氢脱附温度时,LL 内的掺杂剂扩散率仍很高(约为 10 cm s),但我们证明,通过将高 LL 生长速率与低温 LL 快速热退火相结合,可以实现 Si:P 单层中具有高电质量的异常尖锐的掺杂剂限制。本研究中开发的方法为需要精确掺杂剂位置以抑制、量化和预测单个掺杂剂在原子尺度上的运动的二维制造技术提供了关键工具。