Pandey Shivendra, Macias Nicholas J, Ciobanu Carmen, Yoon ChangKyu, Teuscher Christof, Gracias David H
Department of Chemical and Biomolecular Engineering, The Johns Hopkins University, Baltimore, MD 21218, USA.
Department of Engineering and Computer Science, Clark College, Vancouver, WA 98663, USA.
Micromachines (Basel). 2016 Apr 28;7(5):78. doi: 10.3390/mi7050078.
The assembly of integrated circuits in three dimensions (3D) provides a possible solution to address the ever-increasing demands of modern day electronic devices. It has been suggested that by using the third dimension, devices with high density, defect tolerance, short interconnects and small overall form factors could be created. However, apart from pseudo 3D architecture, such as monolithic integration, die, or wafer stacking, the creation of paradigms to integrate electronic low-complexity cellular building blocks in architecture that has tile space in all three dimensions has remained elusive. Here, we present software and hardware foundations for a truly 3D cellular computational devices that could be realized in practice. The computing architecture relies on the scalable, self-configurable and defect-tolerant cell matrix. The hardware is based on a scalable and manufacturable approach for 3D assembly using folded polyhedral electronic blocks (E-blocks). We created monomers, dimers and 2 × 2 × 2 assemblies of polyhedral E-blocks and verified the computational capabilities by implementing simple logic functions. We further show that 63.2% more compact 3D circuits can be obtained with our design automation tools compared to a 2D architecture. Our results provide a proof-of-concept for a scalable and manufacture-ready process for constructing massive-scale 3D computational devices.
三维（3D）集成电路组装为满足现代电子设备不断增长的需求提供了一种可能的解决方案。有人提出，通过利用第三维，可以制造出具有高密度、容错性、短互连和小整体外形尺寸的设备。然而，除了伪3D架构，如单片集成、芯片或晶圆堆叠外，在具有三维平铺空间的架构中集成电子低复杂度细胞构建块的范例仍然难以实现。在此，我们展示了一种在实践中可以实现的真正3D细胞计算设备的软件和硬件基础。该计算架构依赖于可扩展、自配置和容错的细胞矩阵。硬件基于一种使用折叠多面体电子块（E块）进行3D组装的可扩展且可制造的方法。我们创建了多面体E块的单体、二聚体和2×2×2组件，并通过实现简单逻辑功能验证了其计算能力。我们进一步表明，与二维架构相比，使用我们的设计自动化工具可以获得更紧凑63.2%的3D电路。我们的结果为构建大规模3D计算设备的可扩展且可制造的工艺提供了概念验证。
