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基于嵌段共聚物光刻技术的部分悬空二维材料高性能场效应晶体管。

High Performance Field-Effect Transistors Based on Partially Suspended 2D Materials via Block Copolymer Lithography.

作者信息

Kim Simon, Lee Su Eon, Park Jun Hyun, Shin Jin Yong, Lee Bom, Lim Heo Yeon, Oh Young Taek, Hwang Jun Pyo, Seon Seung Won, Kim Seung Hee, Yu Tae Sang, Kim Bong Hoon

机构信息

Department of Organic Materials and Fiber Engineering, Soongsil University, 369 Sangdo-ro, Dongjak-gu, Seoul 06978, Korea.

Department of Smart Wearable Engineering, Soongsil University, 369 Sangdo-ro, Dongjak-gu, Seoul 06978, Korea.

出版信息

Polymers (Basel). 2021 Feb 14;13(4):566. doi: 10.3390/polym13040566.

DOI:10.3390/polym13040566
PMID:33672839
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC7918588/
Abstract

Although various two-dimensional (2D) materials hold great promise in next generation electronic devices, there are many challenges to overcome to be used in practical applications. One of them is the substrate effect, which directly affects the device performance. The large interfacial area and interaction between 2D materials and substrate significantly deteriorate the device performance. Several top-down approaches have been suggested to solve the problem. Unfortunately, however, they have some drawbacks such as a complicated fabrication process, a high production cost, or a poor mechanical property. Here, we suggest the partially suspended 2D materials-based field-effect transistors (FETs) by introducing block copolymer (BCP) lithography to fabricate the substrate effect-free 2D electronic devices. A wide range of nanometer size holes (diameter = 31~43 nm) is successfully realized with a BCP self-assembly nanopatterning process. With this approach, the interaction mechanism between active 2D materials and substrate is elucidated by precisely measuring the device performance at varied feature size. Our strategy can be widely applied to fabricate 2D materials-based high performance electronic, optoelectronic, and energy devices using a versatile self-assembly nanopatterning process.

摘要

尽管各种二维(2D)材料在下一代电子设备中具有巨大潜力,但要在实际应用中使用仍有许多挑战需要克服。其中之一是衬底效应,它直接影响器件性能。二维材料与衬底之间的大界面面积和相互作用会显著降低器件性能。已经提出了几种自上而下的方法来解决这个问题。然而,不幸的是,它们存在一些缺点,如制造工艺复杂、生产成本高或机械性能差。在此,我们通过引入嵌段共聚物(BCP)光刻技术来制造无衬底效应的二维电子器件,从而提出了基于部分悬空二维材料的场效应晶体管(FET)。通过BCP自组装纳米图案化工艺成功实现了宽范围的纳米尺寸孔(直径 = 31~43 nm)。通过这种方法,通过精确测量不同特征尺寸下的器件性能,阐明了活性二维材料与衬底之间的相互作用机制。我们的策略可以广泛应用于使用通用的自组装纳米图案化工艺制造基于二维材料的高性能电子、光电子和能量器件。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f65d/7918588/cb5d76ac3f58/polymers-13-00566-g004.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f65d/7918588/8c82c07ac196/polymers-13-00566-g001.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f65d/7918588/2e7cc7128e09/polymers-13-00566-g002.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f65d/7918588/eb8778f1d2f9/polymers-13-00566-g003.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f65d/7918588/cb5d76ac3f58/polymers-13-00566-g004.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f65d/7918588/8c82c07ac196/polymers-13-00566-g001.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f65d/7918588/2e7cc7128e09/polymers-13-00566-g002.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f65d/7918588/eb8778f1d2f9/polymers-13-00566-g003.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f65d/7918588/cb5d76ac3f58/polymers-13-00566-g004.jpg

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