Trensch Guido, Morrison Abigail
Simulation and Data Laboratory Neuroscience, Jülich Supercomputing Centre, Institute for Advanced Simulation, Jülich Research Centre, Jülich, Germany.
Department of Computer Science 3-Software Engineering, RWTH Aachen University, Aachen, Germany.
Front Neuroinform. 2022 Jun 29;16:884033. doi: 10.3389/fninf.2022.884033. eCollection 2022.
Despite the great strides neuroscience has made in recent decades, the underlying principles of brain function remain largely unknown. Advancing the field strongly depends on the ability to study large-scale neural networks and perform complex simulations. In this context, simulations in hyper-real-time are of high interest, as they would enable both comprehensive parameter scans and the study of slow processes, such as learning and long-term memory. Not even the fastest supercomputer available today is able to meet the challenge of accurate and reproducible simulation with hyper-real acceleration. The development of novel neuromorphic computer architectures holds out promise, but the high costs and long development cycles for application-specific hardware solutions makes it difficult to keep pace with the rapid developments in neuroscience. However, advances in System-on-Chip (SoC) device technology and tools are now providing interesting new design possibilities for application-specific implementations. Here, we present a novel hybrid software-hardware architecture approach for a neuromorphic compute node intended to work in a multi-node cluster configuration. The node design builds on the Xilinx Zynq-7000 SoC device architecture that combines a powerful programmable logic gate array (FPGA) and a dual-core ARM Cortex-A9 processor extension on a single chip. Our proposed architecture makes use of both and takes advantage of their tight coupling. We show that available SoC device technology can be used to build smaller neuromorphic computing clusters that enable hyper-real-time simulation of networks consisting of tens of thousands of neurons, and are thus capable of meeting the high demands for modeling and simulation in neuroscience.
尽管近几十年来神经科学取得了巨大进展,但大脑功能的基本原理在很大程度上仍然未知。该领域的发展在很大程度上取决于研究大规模神经网络和进行复杂模拟的能力。在这种背景下,超实时模拟备受关注,因为它们能够实现全面的参数扫描以及对学习和长期记忆等缓慢过程的研究。即使是当今最快的超级计算机也无法应对超实时加速下准确且可重复模拟的挑战。新型神经形态计算机架构的发展带来了希望,但针对特定应用的硬件解决方案成本高昂且开发周期长,难以跟上神经科学的快速发展。然而,片上系统(SoC)设备技术和工具的进步现在为特定应用的实现提供了有趣的新设计可能性。在此,我们提出一种新颖的混合软硬件架构方法,用于设计一个旨在工作在多节点集群配置中的神经形态计算节点。该节点设计基于赛灵思Zynq-7000 SoC设备架构,该架构在单个芯片上集成了强大的可编程逻辑门阵列(FPGA)和双核ARM Cortex-A9处理器扩展。我们提出的架构同时利用了这两者,并利用了它们的紧密耦合。我们表明,现有的SoC设备技术可用于构建更小的神经形态计算集群,这些集群能够对由数万个神经元组成的网络进行超实时模拟,从而能够满足神经科学中建模和模拟的高要求。