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一款具有基于电导的突触和膜动力学的22皮焦/尖峰、73兆尖峰/秒、13万个神经元胞体的神经阵列收发器。

A 22-pJ/spike 73-Mspikes/s 130k-compartment neural array transceiver with conductance-based synaptic and membrane dynamics.

作者信息

Park Jongkil, Ha Sohmyung, Yu Theodore, Neftci Emre, Cauwenberghs Gert

机构信息

Center for Neuromorphic Engineering, Korea Institute of Science and Technology (KIST), Seoul, Republic of Korea.

Institute for Neural Computation, University of California, San Diego, La Jolla, CA, United States.

出版信息

Front Neurosci. 2023 Aug 28;17:1198306. doi: 10.3389/fnins.2023.1198306. eCollection 2023.

DOI:10.3389/fnins.2023.1198306
PMID:37700751
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC10493285/
Abstract

Neuromorphic cognitive computing offers a bio-inspired means to approach the natural intelligence of biological neural systems in silicon integrated circuits. Typically, such circuits either reproduce biophysical neuronal dynamics in great detail as tools for computational neuroscience, or abstract away the biology by simplifying the functional forms of neural computation in large-scale systems for machine intelligence with high integration density and energy efficiency. Here we report a hybrid which offers biophysical realism in the emulation of multi-compartmental neuronal network dynamics at very large scale with high implementation efficiency, and yet with high flexibility in configuring the functional form and the network topology. The integrate-and-fire array transceiver (IFAT) chip emulates the continuous-time analog membrane dynamics of 65 k two-compartment neurons with conductance-based synapses. Fired action potentials are registered as address-event encoded output spikes, while the four types of synapses coupling to each neuron are activated by address-event decoded input spikes for fully reconfigurable synaptic connectivity, facilitating virtual wiring as implemented by routing address-event spikes externally through synaptic routing table. Peak conductance strength of synapse activation specified by the address-event input spans three decades of dynamic range, digitally controlled by pulse width and amplitude modulation (PWAM) of the drive voltage activating the log-domain linear synapse circuit. Two nested levels of micro-pipelining in the IFAT architecture improve both throughput and efficiency of synaptic input. This two-tier micro-pipelining results in a measured sustained peak throughput of 73 Mspikes/s and overall chip-level energy efficiency of 22 pJ/spike. Non-uniformity in digitally encoded synapse strength due to analog mismatch is mitigated through single-point digital offset calibration. Combined with the flexibly layered and recurrent synaptic connectivity provided by hierarchical address-event routing of registered spike events through external memory, the IFAT lends itself to efficient large-scale emulation of general biophysical spiking neural networks, as well as rate-based mapping of rectified linear unit (ReLU) neural activations.

摘要

神经形态认知计算提供了一种受生物启发的方法,用于在硅集成电路中逼近生物神经系统的自然智能。通常,此类电路要么作为计算神经科学的工具,非常详细地再现生物物理神经元动力学,要么通过简化大规模系统中神经计算的功能形式来抽象生物学特性,以实现高集成密度和能源效率的机器智能。在此,我们报告了一种混合体,它在大规模模拟多房室神经网络动力学时提供生物物理真实性,具有高实现效率,同时在配置功能形式和网络拓扑方面具有高度灵活性。积分发放阵列收发器(IFAT)芯片模拟了65k个具有基于电导突触的双房室神经元的连续时间模拟膜动力学。发放的动作电位被记录为地址事件编码的输出尖峰,而与每个神经元耦合的四种类型的突触由地址事件解码的输入尖峰激活,以实现完全可重构的突触连接,便于通过外部突触路由表路由地址事件尖峰来实现虚拟布线。由地址事件输入指定的突触激活的峰值电导强度跨越三个数量级的动态范围,通过驱动电压的脉冲宽度和幅度调制(PWAM)进行数字控制,该驱动电压激活对数域线性突触电路。IFAT架构中的两级微流水线提高了突触输入的吞吐量和效率。这种两层微流水线导致测得的持续峰值吞吐量为73Mspikes/s,芯片级整体能源效率为22pJ/尖峰。通过单点数字偏移校准减轻了由于模拟失配导致的数字编码突触强度的不均匀性。结合通过外部存储器对已记录尖峰事件进行分层地址事件路由所提供的灵活分层和循环突触连接,IFAT适用于对一般生物物理脉冲神经网络进行高效大规模模拟,以及对整流线性单元(ReLU)神经激活进行基于速率的映射。

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