Lawrence Berkeley National Laboratory, Berkeley, CA 94720, USA.
Sensors (Basel). 2024 Jun 19;24(12):3986. doi: 10.3390/s24123986.
The complexity of information processing in the brain requires the development of technologies that can provide spatial and temporal resolution by means of dense electrode arrays paired with high-channel-count signal acquisition electronics. In this work, we present an ultra-low noise modular 512-channel neural recording circuit that is scalable to up to 4096 simultaneously recording channels. The neural readout application-specific integrated circuit (ASIC) uses a dense 8.2 mm × 6.8 mm 2D layout to enable high-channel count, creating an ultra-light 350 mg flexible module. The module can be deployed on headstages for small animals like rodents and songbirds, and it can be integrated with a variety of electrode arrays. The chip was fabricated in a TSMC 0.18 µm 1.8 V CMOS technology and dissipates a total of 125 mW. Each DC-coupled channel features a gain and bandwidth programmable analog front-end along with 14 b analog-to-digital conversion at speeds up to 30 kS/s. Additionally, each front-end includes programmable electrode plating and electrode impedance measurement capability. We present both standalone and in vivo measurements results, demonstrating the readout of spikes and field potentials that are modulated by a sensory input.
大脑中的信息处理复杂性要求开发能够通过密集电极阵列与高通道计数信号采集电子设备相结合提供空间和时间分辨率的技术。在这项工作中,我们提出了一种超低噪声的模块化 512 通道神经记录电路,该电路可扩展到多达 4096 个同时记录的通道。神经读出专用集成电路 (ASIC) 使用密集的 8.2mm×6.8mm2D 布局实现高通道计数,创建了超轻的 350mg 柔性模块。该模块可以部署在啮齿动物和鸣禽等小动物的头戴式设备上,并且可以与各种电极阵列集成。该芯片采用 TSMC 0.18µm 1.8V CMOS 技术制造,总功耗为 125mW。每个直流耦合通道都具有增益和带宽可编程的模拟前端,以及 14 位模拟到数字转换,速度高达 30kS/s。此外,每个前端都包括可编程电极电镀和电极阻抗测量能力。我们展示了独立和体内测量结果,演示了由感觉输入调制的尖峰和场电位的读出。