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揭示一氧化氮在高性能P型WSe晶体管中的掺杂机制。

Uncovering the doping mechanism of nitric oxide in high-performance P-type WSe transistors.

作者信息

Lan Hao-Yu, Lin Chih-Pin, Liu Lina, Cai Jun, Sun Zheng, Wu Peng, Tan Yuanqiu, Yang Shao-Heng, Hou Tuo-Hung, Appenzeller Joerg, Chen Zhihong

机构信息

Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA.

Birck Nanotechnology Center, Purdue University, West Lafayette, IN, USA.

出版信息

Nat Commun. 2025 May 5;16(1):4160. doi: 10.1038/s41467-025-59423-9.

Abstract

Atomically thin two-dimensional (2D) semiconductors are promising candidates for beyond-silicon electronic devices. However, an excessive contact resistance due to ineffective or non-existent doping techniques hinders their technological readiness. Here, we unveil the doping mechanism of pure nitric oxide and demonstrate its effectiveness on wafer-scale grown monolayer and bilayer tungsten diselenide (1L- and 2L-WSe) transistors, where doping bands induced by nitric oxide can realign the Schottky barrier and approach p-type unipolar transport. This doping approach, combined with a scaled high-κ dielectric, yields WSe transistors with high performance metrics. For monolayer WSe, we achieved an on-state current of 300 μA/μm (at a drain-to-source voltage of -1 V and overdrive voltage of -0.8 V), contact resistance of 875 Ω·μm, peak transconductance of 400 μS/μm, and a subthreshold swing of 70 mV/dec, while preserving on/off ratios >10, minimal variability, and good stability over 24 days under moderate thermal conditions. For bilayer WSe, the devices exhibit an on-state current of 448 μA/μm and contact resistance of 390 Ω·μm, further showcasing the scalability and effectiveness of the NO doping method. Our findings establish NO doping as a promising technique for realizing high-performance p-type 2D transistors and advancing next-generation ultra-scaled electronic devices.

摘要

原子级厚度的二维半导体是超越硅基电子器件的有潜力的候选材料。然而,由于无效或不存在的掺杂技术导致的过高接触电阻阻碍了它们的技术实用性。在此,我们揭示了纯一氧化氮的掺杂机制,并证明了其在晶圆级生长的单层和双层二硒化钨(1L-和2L-WSe)晶体管上的有效性,其中一氧化氮诱导的掺杂能带可以重新调整肖特基势垒并实现p型单极传输。这种掺杂方法与缩放的高κ电介质相结合,产生了具有高性能指标的WSe晶体管。对于单层WSe,我们实现了300 μA/μm的导通电流(在漏源电压为-1 V和过驱动电压为-0.8 V时)、875 Ω·μm的接触电阻、400 μS/μm的峰值跨导以及70 mV/dec的亚阈值摆幅,同时在中等热条件下保持开/关比>10、最小的变化性以及24天内良好的稳定性。对于双层WSe,器件表现出448 μA/μm的导通电流和390 Ω·μm的接触电阻,进一步展示了NO掺杂方法的可扩展性和有效性。我们的发现确立了NO掺杂作为一种有前途的技术,用于实现高性能p型二维晶体管并推动下一代超缩放电子器件的发展。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/f854/12052964/fc4deeb40457/41467_2025_59423_Fig1_HTML.jpg

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