Key Laboratory for the Physics and Chemistry of Nanodevices and Department of Electronics, Peking University, Beijing 100871, China.
Nano Lett. 2010 Jun 9;10(6):2024-30. doi: 10.1021/nl100022u.
High-quality yttrium oxide (Y(2)O(3)) is investigated as an ideal high-kappa gate dielectric for carbon-based electronics through a simple and cheap process. Utilizing the excellent wetting behavior of yttrium on sp(2) carbon framework, ultrathin (about few nm) and uniform Y(2)O(3) layers have been directly grown on the surfaces of carbon nanotube (CNT) and graphene without using noncovalent functionalization layers or introducing large structural distortion and damage. A top-gate CNT field-effect transistor (FET) adopting 5 nm Y(2)O(3) layer as its top-gate dielectric shows excellent device characteristics, including an ideal subthreshold swing of 60 mV/decade (up to the theoretical limit of an ideal FET at room temperature). The high electrical quality Y(2)O(3) dielectric layer has also been integrated into a graphene FET as its top-gate dielectric with a capacitance of up to 1200 nF/cm(2), showing an improvement on the gate efficiency and on state transconductance of over 100 times when compared with that of its back-gate counterpart.
高品质氧化钇（Y2O3）因其具有理想的高介电常数，有望成为碳基电子学的理想高 k 介电材料。通过一种简单廉价的方法，利用钇在 sp2 碳骨架上的优异润湿性，将超薄（约几纳米）且均匀的 Y2O3 层直接生长在碳纳米管（CNT）和石墨烯的表面，无需使用非共价官能化层或引入大的结构变形和破坏。采用 5nm Y2O3 层作为顶栅介电层的顶栅 CNT 场效应晶体管（FET）表现出优异的器件特性，包括理想的亚阈值摆幅为 60mV/decade（达到室温下理想 FET 的理论极限）。高质量的 Y2O3 介电层也已被集成到石墨烯 FET 中作为其顶栅介电层，其电容高达 1200nF/cm2，与背栅相比，栅极效率和导通状态跨导提高了 100 多倍。
