IBM T. J. Watson Research Center, Yorktown Heights, New York 10598, USA.
Nano Lett. 2013 Jun 12;13(6):2490-5. doi: 10.1021/nl400544q. Epub 2013 May 2.
Among the challenges hindering the integration of carbon nanotube (CNT) transistors in digital technology are the lack of a scalable self-aligned gate and complementary n- and p-type devices. We report CNT transistors with self-aligned gates scaled down to 20 nm in the ideal gate-all-around geometry. Uniformity of the gate wrapping the nanotube channels is confirmed, and the process is shown not to damage the CNTs. Further, both n- and p-type transistors were realized by using the appropriate gate dielectric-HfO2 yielded n-type and Al2O3 yielded p-type-with quantum simulations used to explore the impact of important device parameters on performance. These discoveries not only provide a promising platform for further research into gate-all-around CNT devices but also demonstrate that scalable digital switches with realistic technological potential can be achieved with carbon nanotubes.
在阻碍碳纳米管（CNT）晶体管集成到数字技术中的挑战中，缺乏可扩展的自对准栅极和互补的 n 型和 p 型器件是其中之一。我们报告了具有自对准栅极的 CNT 晶体管，其栅极在理想的全环绕几何形状下缩小到 20nm。证实了栅极包裹纳米管通道的均匀性，并且该工艺不会损坏 CNT。此外，通过使用适当的栅介质（HfO2 产生 n 型，Al2O3 产生 p 型）实现了 n 型和 p 型晶体管，量子模拟用于探索重要器件参数对性能的影响。这些发现不仅为进一步研究全环绕 CNT 器件提供了一个有前途的平台，而且还表明具有实际技术潜力的可扩展数字开关可以用碳纳米管实现。
