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用于植入式神经传感器的自适应分辨率 ADC 阵列。

Adaptive Resolution ADC Array for an Implantable Neural Sensor.

出版信息

IEEE Trans Biomed Circuits Syst. 2011 Apr;5(2):120-30. doi: 10.1109/TBCAS.2011.2145418.

Abstract

This paper describes an analog-to-digital converter (ADC) array for an implantable neural sensor which digitizes neural signals sensed by a microelectrode array. The ADC array consists of 96 variable resolution ADC base cells. The resolution of each ADC cell in the array is varied according to neural data content of the signal from the corresponding electrode. The resolution adaptation algorithm is essentially to periodically recalibrate the required resolution and this is done without requiring any additional ADC cells. The adaptation implementation and results are described. The base ADC cell is implemented using a successive approximation charge redistribution architecture. The choice of architecture and circuit design are presented. The base ADC has been implemented in 0.13 μm CMOS as a 100 kS/s SAR ADC whose resolution can be varied from 3 to 8 bits with corresponding power consumption of 0.23 μW to 0.90 μW achieving an ENOB of 7.8 at the 8-bit setting. The energy per conversion step figure of merit is 48 fJ/step at the 8-bit setting. Resolution adaptation reduces power consumption by a factor of 2.3 for typical motor neuron signals while maintaining an effective 7.8-bit resolution across all channels.

摘要

本文描述了一种用于植入式神经传感器的模数转换器(ADC)阵列,用于对微电极阵列感知的神经信号进行数字化。ADC 阵列由 96 个可变分辨率 ADC 基本单元组成。阵列中每个 ADC 单元的分辨率根据来自相应电极的信号中的神经数据内容而变化。分辨率自适应算法本质上是周期性地重新校准所需的分辨率,而无需任何额外的 ADC 单元。描述了自适应实现和结果。基本 ADC 单元使用逐次逼近电荷再分配架构实现。介绍了架构和电路设计的选择。基本 ADC 已在 0.13μm CMOS 中实现,作为 100 kS/s SAR ADC,其分辨率可在 3 位至 8 位之间变化,相应的功耗为 0.23μW 至 0.90μW,在 8 位设置下可实现 7.8 个有效位。在 8 位设置下,每转换步的能量指标为 48fJ/步。分辨率自适应可将典型运动神经元信号的功耗降低 2.3 倍,同时在所有通道上保持有效的 7.8 位分辨率。

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