• 文献检索
  • 文档翻译
  • 深度研究
  • 学术资讯
  • Suppr Zotero 插件Zotero 插件
  • 邀请有礼
  • 套餐&价格
  • 历史记录
应用&插件
Suppr Zotero 插件Zotero 插件浏览器插件Mac 客户端Windows 客户端微信小程序
定价
高级版会员购买积分包购买API积分包
服务
文献检索文档翻译深度研究API 文档MCP 服务
关于我们
关于 Suppr公司介绍联系我们用户协议隐私条款
关注我们

Suppr 超能文献

核心技术专利:CN118964589B侵权必究
粤ICP备2023148730 号-1Suppr @ 2026

文献检索

告别复杂PubMed语法,用中文像聊天一样搜索,搜遍4000万医学文献。AI智能推荐,让科研检索更轻松。

立即免费搜索

文件翻译

保留排版,准确专业,支持PDF/Word/PPT等文件格式,支持 12+语言互译。

免费翻译文档

深度研究

AI帮你快速写综述,25分钟生成高质量综述,智能提取关键信息,辅助科研写作。

立即免费体验

带带宽降低的混合信号多芯片神经记录接口。

A mixed-signal multichip neural recording interface with bandwidth reduction.

出版信息

IEEE Trans Biomed Circuits Syst. 2009 Jun;3(3):129-41. doi: 10.1109/TBCAS.2009.2013718.

DOI:10.1109/TBCAS.2009.2013718
PMID:23853214
Abstract

We present a multichip structure assembled with a medical-grade stainless-steel microelectrode array intended for neural recordings from multiple channels. The design features a mixed-signal integrated circuit (IC) that handles conditioning, digitization, and time-division multiplexing of neural signals, and a digital IC that provides control, bandwidth reduction, and data communications for telemetry toward a remote host. Bandwidth reduction is achieved through action potential detection and complete capture of waveforms by means of onchip data buffering. The adopted architecture uses high parallelism and low-power building blocks for safety and long-term implantability. Both ICs are fabricated in a CMOS 0.18-mum process and are subsequently mounted on the base of the microelectrode array. The chips are stacked according to a vertical integration approach for better compactness. The presented device integrates 16 channels, and is scalable to hundreds of recording channels. Its performance was validated on a testbench with synthetic neural signals. The proposed interface presents a power consumption of 138 muW per channel, a size of 2.30 mm(2), and achieves a bandwidth reduction factor of up to 48 with typical recordings.

摘要

我们提出了一种多芯片结构,它由一个医用级不锈钢微电极阵列组装而成,用于从多个通道进行神经记录。该设计采用了混合信号集成电路(IC),用于处理神经信号的调理、数字化和时分复用,以及数字 IC,用于提供控制、带宽降低和遥测数据通信。带宽降低是通过动作电位检测和通过片上数据缓冲器完全捕获波形来实现的。所采用的架构使用高并行性和低功耗的构建块来实现安全性和长期植入性。这两个 IC 都是在 0.18 微米的 CMOS 工艺中制造的,然后安装在微电极阵列的底座上。芯片根据垂直集成的方法进行堆叠,以获得更好的紧凑性。所提出的设备集成了 16 个通道,可扩展到数百个记录通道。它的性能在一个具有合成神经信号的测试台上进行了验证。所提出的接口每通道的功耗为 138 μW,尺寸为 2.30mm2,并在典型记录中实现高达 48 的带宽降低因子。

相似文献

1
A mixed-signal multichip neural recording interface with bandwidth reduction.带带宽降低的混合信号多芯片神经记录接口。
IEEE Trans Biomed Circuits Syst. 2009 Jun;3(3):129-41. doi: 10.1109/TBCAS.2009.2013718.
2
A 1024-Channel 268 nW/pixel 36×36 m/channel Data-Compressive Neural Recording IC for High-Bandwidth Brain-Computer Interfaces.一款用于高带宽脑机接口的1024通道、每像素268纳瓦、每通道36×36平方毫米的数据压缩神经记录集成电路。
IEEE J Solid-State Circuits. 2024 Apr;59(4):1123-1136. doi: 10.1109/jssc.2023.3344798. Epub 2023 Dec 29.
3
An ultra low-power CMOS automatic action potential detector.一种超低功耗互补金属氧化物半导体自动动作电位检测器。
IEEE Trans Neural Syst Rehabil Eng. 2009 Aug;17(4):346-53. doi: 10.1109/TNSRE.2009.2018103. Epub 2009 Apr 10.
4
A 128-channel 6 mW wireless neural recording IC with spike feature extraction and UWB transmitter.一款具备尖峰特征提取功能和超宽带发射器的128通道6毫瓦无线神经记录集成电路。
IEEE Trans Neural Syst Rehabil Eng. 2009 Aug;17(4):312-21. doi: 10.1109/TNSRE.2009.2021607. Epub 2009 May 8.
5
A low-power configurable neural recording system for epileptic seizure detection.用于癫痫发作检测的低功耗可配置神经记录系统。
IEEE Trans Biomed Circuits Syst. 2013 Aug;7(4):499-512. doi: 10.1109/TBCAS.2012.2228857.
6
Adaptive Resolution ADC Array for an Implantable Neural Sensor.用于植入式神经传感器的自适应分辨率 ADC 阵列。
IEEE Trans Biomed Circuits Syst. 2011 Apr;5(2):120-30. doi: 10.1109/TBCAS.2011.2145418.
7
Integrated wireless neural interface based on the Utah electrode array.基于犹他电极阵列的集成无线神经接口。
Biomed Microdevices. 2009 Apr;11(2):453-66. doi: 10.1007/s10544-008-9251-y.
8
Area-Power Efficient VLSI Implementation of Multichannel DWT for Data Compression in Implantable Neuroprosthetics.用于植入式神经假肢数据压缩的多通道 DWT 的面积-功耗高效 VLSI 实现。
IEEE Trans Biomed Circuits Syst. 2007 Jun;1(2):128-35. doi: 10.1109/TBCAS.2007.907557.
9
A CMOS integrated circuit for multichannel multiple-subject biotelemetry using bidirectional optical transmissions.一种用于多通道多对象生物遥测的采用双向光传输的互补金属氧化物半导体集成电路。
IEEE Trans Biomed Eng. 1994 Apr;41(4):400-6. doi: 10.1109/10.284972.
10
The 128-channel fully differential digital integrated neural recording and stimulation interface.128 通道全差分数字集成神经记录和刺激接口。
IEEE Trans Biomed Circuits Syst. 2010 Jun;4(3):149-61. doi: 10.1109/TBCAS.2010.2041350.

引用本文的文献

1
Analysis and Reduction of Nonlinear Distortion in AC-Coupled CMOS Neural Amplifiers with Tunable Cutoff Frequencies.具有可调截止频率的 AC 耦合 CMOS 神经放大器中的非线性失真分析与减小。
Sensors (Basel). 2021 Apr 30;21(9):3116. doi: 10.3390/s21093116.
2
Multi-Channel Neural Recording Implants: A Review.多通道神经记录植入物:综述。
Sensors (Basel). 2020 Feb 7;20(3):904. doi: 10.3390/s20030904.
3
Characteristics of Transparent, PEDOT:PSS Coated Indium-Tin-Oxide (ITO) Microelectrodes.透明的聚(3,4-乙撑二氧噻吩):聚苯乙烯磺酸盐(PEDOT:PSS)涂层氧化铟锡(ITO)微电极的特性
IEEE Trans Nanotechnol. 2018 Jul;17(4):701-704. doi: 10.1109/TNANO.2017.2785627. Epub 2017 Dec 20.
4
0.6 V, 116 nW Neural Spike Acquisition IC with Self-Biased Instrumentation Amplifier and Analog Spike Extraction.0.6V、116nW 神经尖峰采集 IC,具有自偏置仪表放大器和模拟尖峰提取功能。
Sensors (Basel). 2018 Jul 30;18(8):2460. doi: 10.3390/s18082460.
5
A Low Noise Amplifier for Neural Spike Recording Interfaces.一种用于神经尖峰记录接口的低噪声放大器。
Sensors (Basel). 2015 Sep 30;15(10):25313-35. doi: 10.3390/s151025313.
6
An Efficient VLSI Architecture for Multi-Channel Spike Sorting Using a Generalized Hebbian Algorithm.一种使用广义赫布算法进行多通道尖峰分类的高效超大规模集成电路架构。
Sensors (Basel). 2015 Aug 13;15(8):19830-51. doi: 10.3390/s150819830.
7
A High Performance Delta-Sigma Modulator for Neurosensing.一种用于神经传感的高性能Delta-Sigma调制器。
Sensors (Basel). 2015 Aug 7;15(8):19466-86. doi: 10.3390/s150819466.
8
A CMOS IC-based multisite measuring system for stimulation and recording in neural preparations in vitro.一种基于CMOS集成电路的体外神经标本刺激与记录多部位测量系统。
Front Neuroeng. 2014 Oct 10;7:39. doi: 10.3389/fneng.2014.00039. eCollection 2014.
9
A Fully Implantable, Programmable and Multimodal Neuroprocessor for Wireless, Cortically Controlled Brain-Machine Interface Applications.一种用于无线、皮层控制脑机接口应用的完全可植入、可编程且多模态神经处理器。
J Signal Process Syst. 2012 Dec 1;69(3):351-361. doi: 10.1007/s11265-012-0670-x. Epub 2011 Jun 15.
10
Recent advances in neural recording microsystems.神经记录微系统的最新进展。
Sensors (Basel). 2011;11(5):4572-97. doi: 10.3390/s110504572. Epub 2011 Apr 27.