Department of Chemistry and Chemical Biology and School of Engineering and Applied Science, Harvard University, Cambridge, MA 02138.
Proc Natl Acad Sci U S A. 2014 Feb 18;111(7):2431-5. doi: 10.1073/pnas.1323818111. Epub 2014 Jan 27.
Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine. The system was fabricated using a design-oriented approach enabled by a deterministic, bottom-up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoelectronic finite-state machine through modular design using a multitile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each cross-point consisting of a programmable nanowire transistor node. The nanoelectronic finite-state machine integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive intertile and intratile communication that exhibits rigorous input/output matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a finite-state machine or computer. The programmable multitile circuit was also reprogrammed to a functionally distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our unique design-oriented deterministic methodology to yield more extensive multitile systems suggest that proposed general-purpose nanocomputers can be realized in the near future.
从底层组装并在纳米尺度上集成复杂的计算机电路一直是电子学研究的目标。这需要一种设计和制造策略,既能解决单个纳米级电子器件的问题,又能实现这些器件的大规模组装,形成高度组织化、集成的计算电路。我们描述了这种策略如何导致了纳米电子有限状态机的设计、构建和演示。该系统是使用一种设计导向的方法制造的,这种方法得益于一种确定性的、自下而上的组装过程,不需要对每个纳米线进行注册。这种方法允许通过使用多单元架构的模块化设计来构建纳米电子有限状态机。每个单元/模块由两个相互连接的交叉纳米线阵列组成,每个交叉点由一个可编程纳米线晶体管节点组成。纳米电子有限状态机在三个单元或总共六个交叉纳米线阵列中集成了 180 个可编程纳米线晶体管节点,并结合了顺序和算术逻辑,具有广泛的单元间和单元内通信,表现出严格的输入/输出匹配。我们的系统实现了完整的 2 位逻辑流程和时钟控制,这是有限状态机或计算机所必需的。可编程的多单元电路也被重新编程为具有 32 位匹配和完整逻辑输出的功能不同的 2 位全加器。这些步骤的推进以及我们独特的设计导向确定性方法能够产生更广泛的多单元系统,表明所提出的通用纳米计算机在不久的将来可以实现。