Shih Huan-Yu, Shiojiri Makoto, Chen Ching-Hsiang, Yu Sheng-Fu, Ko Chung-Ting, Yang Jer-Ren, Lin Ray-Ming, Chen Miin-Jang
Department of Materials Science and Engineering, National Taiwan University, Taipei, Taiwan.
Kyoto Institute of Technology, Kyoto, Japan.
Sci Rep. 2015 Sep 2;5:13671. doi: 10.1038/srep13671.
High threading dislocation (TD) density in GaN-based devices is a long unresolved problem because of the large lattice mismatch between GaN and the substrate, which causes a major obstacle for the further improvement of next-generation high-efficiency solid-state lighting and high-power electronics. Here, we report InGaN/GaN LEDs with ultralow TD density and improved efficiency on a sapphire substrate, on which a near strain-free GaN compliant buffer layer was grown by remote plasma atomic layer deposition. This "compliant" buffer layer is capable of relaxing strain due to the absorption of misfit dislocations in a region within ~10 nm from the interface, leading to a high-quality overlying GaN epilayer with an unusual TD density as low as 2.2 × 10(5) cm(-2). In addition, this GaN compliant buffer layer exhibits excellent uniformity up to a 6" wafer, revealing a promising means to realize large-area GaN hetero-epitaxy for efficient LEDs and high-power transistors.
由于氮化镓(GaN)与衬底之间存在较大的晶格失配,基于GaN的器件中高位错(TD)密度是一个长期未解决的问题,这对下一代高效固态照明和高功率电子器件的进一步改进造成了重大障碍。在此,我们报道了在蓝宝石衬底上具有超低TD密度和更高效率的InGaN/GaN发光二极管(LED),在该衬底上通过远程等离子体原子层沉积生长了近乎无应变的GaN顺应性缓冲层。这种“顺应性”缓冲层能够通过吸收距界面约10纳米范围内区域的失配位错来弛豫应变,从而形成高质量的上覆GaN外延层,其TD密度低至2.2×10⁵ cm⁻² ,十分罕见。此外,这种GaN顺应性缓冲层在6英寸晶圆上表现出优异的均匀性,为实现用于高效LED和高功率晶体管的大面积GaN异质外延提供了一种很有前景的方法。