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电流驱动的磁畴壁逻辑。

Current-driven magnetic domain-wall logic.

机构信息

Laboratory for Mesoscopic Systems, Department of Materials, ETH Zurich, Zurich, Switzerland.

Paul Scherrer Institut, Villigen, Switzerland.

出版信息

Nature. 2020 Mar;579(7798):214-218. doi: 10.1038/s41586-020-2061-y. Epub 2020 Mar 11.

Abstract

Spin-based logic architectures provide nonvolatile data retention, near-zero leakage, and scalability, extending the technology roadmap beyond complementary metal-oxide-semiconductor logic. Architectures based on magnetic domain walls take advantage of the fast motion, high density, non-volatility and flexible design of domain walls to process and store information. Such schemes, however, rely on domain-wall manipulation and clocking using an external magnetic field, which limits their implementation in dense, large-scale chips. Here we demonstrate a method for performing all-electric logic operations and cascading using domain-wall racetracks. We exploit the chiral coupling between neighbouring magnetic domains induced by the interfacial Dzyaloshinskii-Moriya interaction, which promotes non-collinear spin alignment, to realize a domain-wall inverter, the essential basic building block in all implementations of Boolean logic. We then fabricate reconfigurable NAND and NOR logic gates, and perform operations with current-induced domain-wall motion. Finally, we cascade several NAND gates to build XOR and full adder gates, demonstrating electrical control of magnetic data and device interconnection in logic circuits. Our work provides a viable platform for scalable all-electric magnetic logic, paving the way for memory-in-logic applications.

摘要

基于自旋的逻辑架构提供了非易失性数据保持、接近零泄漏和可扩展性,将技术路线图扩展到超越互补金属氧化物半导体逻辑。基于磁畴壁的架构利用畴壁的快速运动、高密度、非易失性和灵活的设计来处理和存储信息。然而,这些方案依赖于使用外部磁场对畴壁进行操作和计时,这限制了它们在密集、大规模芯片中的实现。在这里,我们展示了一种使用畴壁赛道进行全电逻辑操作和级联的方法。我们利用界面 Dzyaloshinskii-Moriya 相互作用诱导的相邻磁畴之间的手性耦合,促进非共线自旋排列,实现了畴壁逆变器,这是所有布尔逻辑实现的基本基本构建块。然后,我们制造了可重构的 NAND 和 NOR 逻辑门,并进行了电流诱导的畴壁运动操作。最后,我们级联了几个 NAND 门来构建 XOR 和全加器门,展示了在逻辑电路中对磁性数据和设备互连的电控制。我们的工作为可扩展的全电磁逻辑提供了一个可行的平台,为内存逻辑应用铺平了道路。

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