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创纪录低亚阈值摆幅的负电容二维场效应晶体管。

Record-Low Subthreshold-Swing Negative-Capacitance 2D Field-Effect Transistors.

作者信息

Wang Yang, Bai Xiaoyuan, Chu Junwei, Wang Hongbo, Rao Gaofeng, Pan Xinqiang, Du Xinchuan, Hu Kai, Wang Xuepeng, Gong Chuanhui, Yin Chujun, Yang Chao, Yan Chaoyi, Wu Chunyang, Shuai Yao, Wang Xianfu, Liao Min, Xiong Jie

机构信息

State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, 610054, P. R. China.

Institute of Microelectronics of Chinese Academy of Sciences, Beijing, 100029, P. R. China.

出版信息

Adv Mater. 2020 Nov;32(46):e2005353. doi: 10.1002/adma.202005353. Epub 2020 Oct 12.

Abstract

Power consumption is one of the most challenging bottlenecks for complementary metal-oxide-semiconductor integration. Negative-capacitance field-effect transistors (NC-FETs) offer a promising platform to break the thermionic limit defined by the Boltzmann tyranny and architect energy-efficient devices. However, it is a great challenge to achieving ultralow-subthreshold-swing (SS) (10 mV dec ) and small-hysteresis NC-FETs simultaneously at room temperature, which has only been reported using the hafnium zirconium oxide system. Here, based on a ferroelectric LiNbO thin film with great spontaneous polarization, an ultralow-SS NC-FET with small hysteresis is designed. The LiNbO NC-FET platform exhibits a record-low SS of 4.97 mV dec with great repeatability due to the superior capacitance matching characteristic as evidenced by the negative differential resistance phenomenon. By modulating the structure and operating parameters (such as channel length (L ), drain-sourse bias (V ), and gate bias (V )) of devices, an optimized SS from ≈40 to ≈10 mV dec and hysteresis from ≈900 to ≈60 mV are achieved simultaneously. The results provide a new potential method for future highly integrated electronic and optical integrated energy-efficient devices.

摘要

功耗是互补金属氧化物半导体集成中最具挑战性的瓶颈之一。负电容场效应晶体管(NC-FET)为突破由玻尔兹曼暴政定义的热电子极限以及构建节能器件提供了一个有前景的平台。然而,在室温下同时实现超低亚阈值摆幅(SS)(10 mV/dec)和小滞后的NC-FET是一项巨大挑战,目前仅报道过使用铪锆氧化物体系实现这一目标。在此,基于具有巨大自发极化的铁电LiNbO薄膜,设计了一种具有小滞后的超低SS的NC-FET。由于负微分电阻现象所证明的卓越电容匹配特性,LiNbO NC-FET平台展现出创纪录的4.97 mV/dec的低SS以及极高的重复性。通过调节器件的结构和工作参数(如沟道长度(L)、漏源偏置(V)和栅极偏置(V)),可同时实现从约40到约10 mV/dec的优化SS以及从约900到约60 mV的滞后。这些结果为未来高度集成的电子和光集成节能器件提供了一种新的潜在方法。

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