Shehzad Khuram, Verma Deeksha, Khan Danial, Ain Qurat Ul, Basim Muhammad, Kim Sung Jin, Rikan Behnam Samadpoor, Pu Young Gun, Hwang Keum Cheol, Yang Youngoo, Lee Kang-Yoon
Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon 16419, Korea.
Sensors (Basel). 2021 Mar 24;21(7):2260. doi: 10.3390/s21072260.
A low power 12-bit, 20 MS/s asynchronously controlled successive approximation register (SAR) analog-to-digital converter (ADC) to be used in wireless access for vehicular environment (WAVE) intelligent transportation system (ITS) sensor based application is presented in this paper. To optimize the architecture with respect to power consumption and performance, several techniques are proposed. A switching method which employs the common mode charge recovery (CMCR) switching process is presented for capacitive digital-to-analog converter (CDAC) part to lower the switching energy. The switching technique proposed in our work consumes 56.3% less energy in comparison with conventional CMCR switching method. For high speed operation with low power consumption and to overcome the kick back issue in the comparator part, a mutated dynamic-latch comparator with cascode is implemented. In addition, to optimize the flexibility relating to the performance of logic part, an asynchronous topology is employed. The structure is fabricated in 65 nm CMOS process technology with an active area of 0.14 mm. With a sampling frequency of 20 MS/s, the proposed architecture attains signal-to-noise distortion ratio (SNDR) of 65.44 dB at Nyquist frequency while consuming only 472.2 µW with 1 V power supply.
本文介绍了一种低功耗12位、20 MS/s异步控制逐次逼近寄存器（SAR）模数转换器（ADC），该转换器用于基于无线接入车辆环境（WAVE）智能交通系统（ITS）传感器的应用。为了在功耗和性能方面优化架构，提出了几种技术。针对电容式数模转换器（CDAC）部分，提出了一种采用共模电荷恢复（CMCR）开关过程的开关方法，以降低开关能量。与传统的CMCR开关方法相比，我们工作中提出的开关技术能耗降低了56.3%。为了实现低功耗高速运行并克服比较器部分的回踢问题，实现了一种带有共源共栅的变异动态锁存比较器。此外，为了优化与逻辑部分性能相关的灵活性，采用了异步拓扑结构。该结构采用65 nm CMOS工艺技术制造，有源面积为0.14 mm²。在采样频率为20 MS/s时，所提出的架构在奈奎斯特频率下实现了65.44 dB的信噪失真比（SNDR），同时在1 V电源下仅消耗472.2 µW的功率。
