Hashemi Noshahr Fereidoon, Nabavi Morteza, Gosselin Benoit, Sawan Mohamad
Polystim Neurotech. Lab., Department of Electrical Engineering, Polytechnique Montreal, Montreal, QC, Canada.
Department of Computer and Electrical Engineering, Université Laval, Québec, QC, Canada.
Front Neurosci. 2021 Jun 2;15:667846. doi: 10.3389/fnins.2021.667846. eCollection 2021.
Scaling down technology demotes the parameters of AC-coupled neural amplifiers, such as increasing the low-cutoff frequency due to the short-channel effects. To improve the low-cutoff frequency, one solution is to increase the feedback capacitors' value. This solution is not desirable, as the input capacitors have to be increased to maintain the same gain, which increases the area and decreases the input impedance of the neural amplifier. We analytically analyze the small-signal behavior of the neural amplifier and prove that the main reason for the increase of the low-cutoff frequency in advanced CMOS technologies is the reduction of the input resistance of the operational transconductance amplifier (OTA). We also show that the reduction of the input resistance of the OTA is due to the increase in the gate oxide leakage in the input transistors. In this paper, we explore this fact and propose two solutions to reduce the low-cutoff frequency without increasing the value of the feedback capacitor. The first solution is performed by only simulation and is called cross-coupled positive feedback that uses pseudoresistors to provide a negative resistance to increase the input resistance of the OTA. As an advantage, only standard CMOS transistors are used in this method. Simulation results show that a low-cutoff frequency of 1.5 Hz is achieved while the midband gain is 30.4 dB at 1 V. In addition, the power consumption is 0.6 μW. In the second method, we utilize thick-oxide MOS transistors in the input differential pair of the OTA. We designed and fabricated the second method in the 65 nm TSMC CMOS process. Measured results are obtained by recordings on slices of mouse brainstem. The measurement results show that the bandwidth is between 2 Hz and 5.6 kHz. The neural amplifier has 34.3 dB voltage gain in midband and consumes 3.63 μ at 1 V power supply. The measurement results show an input-referred noise of 6.1 μ and occupy 0.04 silicon area.
缩小技术规模会降低交流耦合神经放大器的参数，比如由于短沟道效应导致低截止频率增加。为了提高低截止频率，一种解决方案是增大反馈电容的值。但这种解决方案并不可取，因为为了保持相同的增益必须增大输入电容，这会增加面积并降低神经放大器的输入阻抗。我们对神经放大器的小信号行为进行了分析，证明了在先进CMOS技术中低截止频率增加的主要原因是运算跨导放大器（OTA）输入电阻的降低。我们还表明，OTA输入电阻的降低是由于输入晶体管中栅氧化层泄漏的增加。在本文中，我们探讨了这一事实，并提出了两种在不增大反馈电容值的情况下降低低截止频率的解决方案。第一种解决方案仅通过仿真实现，称为交叉耦合正反馈，它使用伪电阻提供负电阻以增加OTA的输入电阻。其优点是该方法仅使用标准CMOS晶体管。仿真结果表明，在1V时实现了1.5Hz的低截止频率，同时中频增益为30.4dB。此外，功耗为0.6μW。在第二种方法中，我们在OTA的输入差分对中使用厚氧化层MOS晶体管。我们在台积电65nm CMOS工艺中设计并制造了第二种方法。通过在小鼠脑干切片上进行记录获得了测量结果。测量结果表明带宽在2Hz至5.6kHz之间。该神经放大器在中频带具有34.3dB的电压增益，在1V电源电压下功耗为3.63μ。测量结果显示输入参考噪声为6.1μ，占用0.04的硅面积。
