Jeon Juhee, Woo Sola, Cho Kyoungah, Kim Sangsig
Department of Electrical Engineering, Korea University, 145 Anam-ro, Seongbuk-gu, Seoul, 02841, Republic of Korea.
Sci Rep. 2022 Jul 22;12(1):12534. doi: 10.1038/s41598-022-16796-x.
In this study, we propose an inverter consisting of reconfigurable double-gated (DG) feedback field-effect transistors (FBFETs) and examine its logic and memory operations through a mixed-mode technology computer-aided design simulation. The DG FBFETs can be reconfigured to n- or p-channel modes, and these modes exhibit an on/off current ratio of ~ 10 and a subthreshold swing (SS) of ~ 0.4 mV/dec. Our study suggests the solution to the output voltage loss, a common problem in FBFET-based inverters; the proposed inverter exhibits the same output logic voltage as the supply voltage in gigahertz frequencies by applying a reset operation between the logic operations. The inverter retains the output logic '1' and '0' states for ~ 21 s without the supply voltage. The proposed inverter demonstrates the promising potential for logic-in-memory application.
在本研究中，我们提出了一种由可重构双栅极（DG）反馈场效应晶体管（FBFET）组成的反相器，并通过混合模式技术计算机辅助设计模拟来研究其逻辑和存储操作。DG FBFET可以重新配置为n沟道或p沟道模式，这些模式的开/关电流比约为10，亚阈值摆幅（SS）约为0.4 mV/dec。我们的研究提出了解决基于FBFET的反相器中常见的输出电压损失问题的方案；通过在逻辑操作之间应用复位操作，所提出的反相器在千兆赫兹频率下表现出与电源电压相同的输出逻辑电压。该反相器在没有电源电压的情况下可将输出逻辑“1”和“0”状态保持约21秒。所提出的反相器展示了在逻辑存储应用方面的广阔前景。
