Kim Seung-Mo, Jun Jae Hyeon, Lee Junho, Taqi Muhammad, Shin Hoseong, Lee Sungwon, Lee Haewon, Yoo Won Jong, Lee Byoung Hun
Center for Semiconductor Technology Convergence, Department of Electrical Engineering, Pohang University of Science and Technology, Cheongam-ro 77, Nam-gu, Pohang 37673, Gyeongbuk, Republic of Korea.
Department of Nano Science and Engineering, Sungkyunkwan University, 2066, Seobu-ro, Jangan-gu, Suwon 16419, Gyeonggi-do, Republic of Korea.
Nanomaterials (Basel). 2024 Oct 17;14(20):1667. doi: 10.3390/nano14201667.
Feedback field-effect transistors (FBFETs) have been studied to obtain near-zero subthreshold swings at 300 K with a high on/off current ratio ~10. However, their structural complexity, such as an epitaxy process after an etch process for a Si channel with a thickness of several nanometers, has limited broader research. We demonstrated a FBFET using in-plane WSe p-n homojunction. The WSe FBFET exhibited a minimum subthreshold swing of 153 mV/dec with 30 nm gate dielectric. Our modeling-based projection indicates that the swing of this device can be reduced to 14 mV/dec with 1 nm EOT. Also, the gain of the inverter using the WSe FBFET can be improved by up to 1.53 times compared to a silicon CMOS inverter, and power consumption can be reduced by up to 11.9%.
反馈场效应晶体管（FBFET）已被研究用于在300K时获得接近零的亚阈值摆幅，其开/关电流比高达~10。然而，它们的结构复杂性，例如在对几纳米厚的硅沟道进行蚀刻工艺后进行外延工艺，限制了更广泛的研究。我们展示了一种使用面内WSe p-n同质结的FBFET。该WSe FBFET在30nm栅极电介质下表现出153mV/dec的最小亚阈值摆幅。我们基于模型的预测表明，使用1nm等效氧化层厚度（EOT）时，该器件的摆幅可降至14mV/dec。此外，与硅CMOS反相器相比，使用WSe FBFET的反相器增益可提高多达1.53倍，功耗可降低多达11.9%。
