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低于表面码阈值的量子纠错

Quantum error correction below the surface code threshold.

出版信息

Nature. 2025 Feb;638(8052):920-926. doi: 10.1038/s41586-024-08449-y. Epub 2024 Dec 9.

Abstract

Quantum error correction provides a path to reach practical quantum computing by combining multiple physical qubits into a logical qubit, in which the logical error rate is suppressed exponentially as more qubits are added. However, this exponential suppression only occurs if the physical error rate is below a critical threshold. Here we present two below-threshold surface code memories on our newest generation of superconducting processors, Willow: a distance-7 code and a distance-5 code integrated with a real-time decoder. The logical error rate of our larger quantum memory is suppressed by a factor of Λ = 2.14 ± 0.02 when increasing the code distance by 2, culminating in a 101-qubit distance-7 code with 0.143% ± 0.003 per cent error per cycle of error correction. This logical memory is also beyond breakeven, exceeding the lifetime of its best physical qubit by a factor of 2.4 ± 0.3. Our system maintains below-threshold performance when decoding in real time, achieving an average decoder latency of 63 microseconds at distance 5 up to a million cycles, with a cycle time of 1.1 microseconds. We also run repetition codes up to distance 29 and find that logical performance is limited by rare correlated error events, occurring approximately once every hour or 3 × 10 cycles. Our results indicate device performance that, if scaled, could realize the operational requirements of large-scale fault-tolerant quantum algorithms.

摘要

量子纠错通过将多个物理量子比特组合成一个逻辑量子比特,为实现实用的量子计算提供了一条途径,其中随着添加更多量子比特,逻辑错误率呈指数级抑制。然而,只有当物理错误率低于临界阈值时,这种指数级抑制才会发生。在此,我们在我们最新一代的超导处理器Willow上展示了两个低于阈值的表面码存储器:一个距离为7的码和一个与实时解码器集成的距离为5的码。当码距增加2时,我们较大的量子存储器的逻辑错误率被抑制了Λ = 2.14 ± 0.02倍,最终得到一个101量子比特的距离为7的码,每个纠错周期的错误率为0.143% ± 0.003%。这个逻辑存储器也实现了收支平衡,其最佳物理量子比特的寿命超出了2.4 ± 0.3倍。我们的系统在实时解码时保持低于阈值的性能,在距离为5时,长达一百万个周期内平均解码器延迟为63微秒,周期时间为1.1微秒。我们还运行了距离高达29的重复码,发现逻辑性能受到罕见相关错误事件的限制,这些事件大约每小时或3×10个周期发生一次。我们的结果表明,如果进行扩展,该器件性能可以满足大规模容错量子算法的运行要求。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/a3c8/11864966/b78906870900/41586_2024_8449_Fig1_HTML.jpg

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