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利用铁电场效应晶体管的可重构内存中顺序逻辑实现

Reconfigurable Sequential-Logic-in-Memory Implementation Utilizing Ferroelectric Field-Effect Transistors.

作者信息

Niu Jingjie, Kim Donggyu, Li Jie, Lyu Jiahui, Lee Yoonmyung, Lee Sungjoo

机构信息

SKKU Advanced Institute of Nanotechnology (SAINT), Sungkyunkwan University, Suwon 16419, Korea.

Department of Nano Science and Technology, Sungkyunkwan University, Suwon 16419, Korea.

出版信息

ACS Nano. 2025 Feb 11;19(5):5493-5502. doi: 10.1021/acsnano.4c14062. Epub 2025 Jan 2.

DOI:10.1021/acsnano.4c14062
PMID:39746872
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC11823589/
Abstract

In modern digital systems, sequential logic circuits store and process information over time, whereas combinational logic circuits process only the current inputs. Conventional sequential systems, however, are complex and energy-inefficient due to the separation of volatile and nonvolatile memory components. This study proposes a compact, nonvolatile, and reconfigurable van der Waals (vdW) ferroelectric field-effect transistor (FeFET)-based sequential logic-in-memory (S-LiM) unit that performs sequential logic operations in two nonvolatile states. Unlike conventional edge computing systems that require separate combinational logic circuits, sequential logic circuits (such as latches for short-term data storage), and nonvolatile memory for long-term data storage, this innovative S-LiM unit integrates logic and memory into a single nonvolatile vdW FeFET device. The nonvolatile ferroelectric elements directly replace both sequential logic and memory in conventional systems, eliminating frequent data transfers, reducing static power, and increasing the storage density. Six distinct logic operations are implemented in a single vdW FeFET through voltage-controlled ferroelectric polarization, highlighting the unit's reconfigurability. The device shows significant potential for low-power edge computing, especially where frequent power cycling is necessary. Its nonvolatile polarization retains the state without the need for storing processes, enabling rapid recovery at startup, even after extended power-off periods of tens of minutes. These features make the vdW FeFET-based S-LiM unit ideal for energy-efficient, high-density, and low-power edge computing, especially in remote operations with unstable power supplies. This innovation contributes to the development of next-generation, low-power electronics with enhanced efficiency and storage density.

摘要

在现代数字系统中,时序逻辑电路会随着时间的推移存储和处理信息,而组合逻辑电路仅处理当前输入。然而,传统的时序系统由于易失性和非易失性存储组件的分离而复杂且能源效率低下。本研究提出了一种基于范德华(vdW)铁电场效应晶体管(FeFET)的紧凑、非易失性且可重构的时序逻辑内存一体化(S-LiM)单元,该单元在两个非易失性状态下执行时序逻辑操作。与需要单独的组合逻辑电路、时序逻辑电路(如用于短期数据存储的锁存器)和用于长期数据存储的非易失性存储器的传统边缘计算系统不同,这种创新的S-LiM单元将逻辑和内存集成到单个非易失性vdW FeFET器件中。非易失性铁电元件直接取代了传统系统中的时序逻辑和内存,消除了频繁的数据传输,降低了静态功耗,并提高了存储密度。通过电压控制的铁电极化,在单个vdW FeFET中实现了六种不同的逻辑操作,突出了该单元的可重构性。该器件在低功耗边缘计算方面显示出巨大潜力,特别是在需要频繁电源循环的情况下。其非易失性极化无需存储过程即可保持状态,即使在长达数十分钟的长时间断电后,也能在启动时快速恢复。这些特性使基于vdW FeFET的S-LiM单元成为节能、高密度和低功耗边缘计算的理想选择,尤其是在电源不稳定的远程操作中。这一创新有助于开发具有更高效率和存储密度的下一代低功耗电子产品。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/b299/11823589/e7b3e119cd1c/nn4c14062_0005.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/b299/11823589/df210d16b6c3/nn4c14062_0001.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/b299/11823589/5f626215ad50/nn4c14062_0002.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/b299/11823589/d8cd1f822962/nn4c14062_0003.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/b299/11823589/e90d10e94a54/nn4c14062_0004.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/b299/11823589/e7b3e119cd1c/nn4c14062_0005.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/b299/11823589/df210d16b6c3/nn4c14062_0001.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/b299/11823589/5f626215ad50/nn4c14062_0002.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/b299/11823589/d8cd1f822962/nn4c14062_0003.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/b299/11823589/e90d10e94a54/nn4c14062_0004.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/b299/11823589/e7b3e119cd1c/nn4c14062_0005.jpg

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