Xia Qiangfei, Robinett Warren, Cumbie Michael W, Banerjee Neel, Cardinali Thomas J, Yang J Joshua, Wu Wei, Li Xuema, Tong William M, Strukov Dmitri B, Snider Gregory S, Medeiros-Ribeiro Gilberto, Williams R Stanley
Hewlett-Packard Laboratories, 1501 Page Mill Road, Palo Alto, California 94304, USA.
Nano Lett. 2009 Oct;9(10):3640-5. doi: 10.1021/nl901874j.
Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.
混合可重构逻辑电路是通过使用纳米压印光刻技术将基于忆阻器的交叉阵列集成到代工制造的CMOS（互补金属氧化物半导体）平台上，并采用与CMOS兼容的材料和工艺制造而成的。二氧化钛薄膜忆阻器在数据路由网络中用作配置位和开关，并以类似于现场可编程门阵列的方式连接到充当逻辑元件的门级CMOS组件。我们使用专门构建的测试系统对芯片进行了分析，并展示了配置单个器件、使用它们连接各种逻辑门和一个触发器，然后重新配置器件的能力。
