Nanoelectronics and Nanotechnology Research Group, Department of Electronics and Computer Science, Faculty of Physical Science and Engineering, University of Southampton, University Road, SO17 1BJ, Southampton, United Kingdom.
Southampton Nanofabrication Centre, University of Southampton, Highfield Campus, Southampton SO17 1BJ, UK.
Sci Rep. 2016 Sep 2;6:32614. doi: 10.1038/srep32614.
Emerging nano-scale technologies are pushing the fabrication boundaries at their limits, for leveraging an even higher density of nano-devices towards reaching 4F(2)/cell footprint in 3D arrays. Here, we study the liftoff process limits to achieve extreme dense nanowires while ensuring preservation of thin film quality. The proposed method is optimized for attaining a multiple layer fabrication to reliably achieve 3D nano-device stacks of 32 × 32 nanowire arrays across 6-inch wafer, using electron beam lithography at 100 kV and polymethyl methacrylate (PMMA) resist at different thicknesses. The resist thickness and its geometric profile after development were identified to be the major limiting factors, and suggestions for addressing these issues are provided. Multiple layers were successfully achieved to fabricate arrays of 1 Ki cells that have sub- 15 nm nanowires distant by 28 nm across 6-inch wafer.
新兴的纳米技术正在将制造极限推向极致，以利用更高密度的纳米器件实现 3D 阵列中每单元 4F(2)的面积密度。在这里，我们研究了实现极限提拉工艺的限制，以在确保薄膜质量的同时实现极密集的纳米线。所提出的方法经过优化，可实现多层制造，从而使用 100kV 的电子束光刻和不同厚度的聚甲基丙烯酸甲酯（PMMA）抗蚀剂可靠地实现 32×32 纳米线阵列的 3D 纳米器件堆叠，该方法可在 6 英寸晶圆上实现 32×32 纳米线阵列。抗蚀剂厚度及其在显影后的几何形状被确定为主要的限制因素，并提供了解决这些问题的建议。成功地实现了多层制造，以在 6 英寸晶圆上制造间距为 28nm、线距小于 15nm 的 1Ki 单元的纳米线阵列。
