Intelligent Devices & Systems Research Group, Institute of Convergence, DGIST, Daegu, 42988, Korea.
Global Center for Bio-Convergence Spin System, DGIST, Daegu, 42988, Korea.
Sci Rep. 2017 Aug 29;7(1):9782. doi: 10.1038/s41598-017-10285-2.
Reliability issues associated with driving metal-oxide semiconductor thin film transistors (TFTs), which may arise from various sequential drain/gate pulse voltage stresses and/or certain environmental parameters, have not received much attention due to the competing desire to characterise the shift in the transistor characteristics caused by gate charging. In this paper, we report on the reliability of these devices under AC bias stress conditions because this is one of the major sources of failure. In our analysis, we investigate the effects of the driving frequency, pulse shape, strength of the applied electric field, and channel current, and the results are compared with those from a general reliability test in which the devices were subjected to negative/positive bias, temperature, and illumination stresses, which are known to cause the most stress to oxide semiconductor TFTs. We also report on the key factors that affect the sub-gap defect states, and suggest a possible origin of the current degradation observed with an AC drive. Circuit designers should apply a similar discovery and analysis method to ensure the reliable design of integrated circuits with oxide semiconductor devices, such as the gate driver circuits used in display devices.
与金属氧化物半导体薄膜晶体管（TFT）相关的可靠性问题，由于竞争的需要，其通常被忽视，这些可靠性问题可能源于各种顺序漏极/栅极脉冲电压应力和/或某些环境参数，栅极充电引起的晶体管特性的偏移需要对其进行特征描述。在本文中，我们报告了在交流偏压应力条件下这些器件的可靠性，因为这是失效的主要原因之一。在我们的分析中，我们研究了驱动频率、脉冲形状、外加电场强度和沟道电流的影响，结果与器件经受负/正偏压、温度和光照应力的一般可靠性测试进行了比较，众所周知，这些因素会对氧化物半导体 TFT 造成最大的应力。我们还报告了影响亚带隙缺陷态的关键因素，并提出了观察到的交流驱动电流退化的可能起源。电路设计人员应应用类似的发现和分析方法，以确保具有氧化物半导体器件的集成电路（如显示器件中使用的栅极驱动电路）的可靠设计。
