Liu Chieh-I, Scaletta Dominick S, Patel Dinesh K, Kruskopf Mattias, Levy Antonio, Hill Heather M, Rigosi Albert F
Physical Measurement Laboratory, National Institute of Standards and Technology (NIST), Gaithersburg, MD 20899, United States.
Department of Chemistry and Biochemistry, University of Maryland, College Park, MD 20742, United States.
J Phys D Appl Phys. 2020;53(27). doi: 10.1088/1361-6463/ab83bb.
Just a few of the promising applications of graphene Corbino J devices include two-dimensional Dirac fermion microscopes, custom programmable quantized resistors, and mesoscopic valley filters. In some cases, device scalability is crucial, as seen in fields like resistance metrology, where graphene devices are required to accommodate currents of the order 100 μA to be compatible with existing infrastructure. However, fabrication of these devices still poses many difficulties. In this work, unusual quantized resistances are observed in epitaxial graphene Corbino junction devices held at the = 2 plateau ( ≈ 12906 Ω) and agree with numerical simulations performed with the LTspice circuit simulator. The formulae describing experimental and simulated data are empirically derived for generalized placement of up to three current terminals and accurately reflects observed partial edge channel cancellation. These results support the use of ultraviolet lithography as a way to scale up graphene-based devices with suitably narrow junctions that could be applied in a variety of subfields.
石墨烯科尔比诺结器件的一些有前景的应用包括二维狄拉克费米子显微镜、定制可编程量子电阻器和介观谷滤波器。在某些情况下，器件的可扩展性至关重要，例如在电阻计量等领域，石墨烯器件需要能够承受约100 μA的电流，以便与现有基础设施兼容。然而，这些器件的制造仍然面临许多困难。在这项工作中，在外延石墨烯科尔比诺结器件中观察到异常的量子电阻，该器件处于ν = 2平台（R≈12906 Ω），并且与使用LTspice电路模拟器进行的数值模拟结果一致。针对多达三个电流端子的一般放置情况，通过实验得出了描述实验数据和模拟数据的公式，该公式准确反映了观察到的部分边缘通道抵消现象。这些结果支持使用紫外光刻技术来扩大基于石墨烯的器件规模，这些器件具有合适的窄结，可应用于各种子领域。
