Large-area integration of two-dimensional materials and their heterostructures by wafer bonding.

Integrating two-dimensional (2D) materials into semiconductor manufacturing lines is essential to exploit their material properties in a wide range of application areas. However, current approaches are not compatible with high-volume manufacturing on wafer level. Here, we report a generic methodology for large-area integration of 2D materials by adhesive wafer bonding. Our approach avoids manual handling and uses equipment, processes, and materials that are readily available in large-scale semiconductor manufacturing lines. We demonstrate the transfer of CVD graphene from copper foils (100-mm diameter) and molybdenum disulfide (MoS) from SiO/Si chips (centimeter-sized) to silicon wafers (100-mm diameter). Furthermore, we stack graphene with CVD hexagonal boron nitride and MoS layers to heterostructures, and fabricate encapsulated field-effect graphene devices, with high carrier mobilities of up to [Formula: see text]. Thus, our approach is suited for backend of the line integration of 2D materials on top of integrated circuits, with potential to accelerate progress in electronics, photonics, and sensing.