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基于场效应隧穿-传输转变的多态异质结晶体管

Multi-State Heterojunction Transistors Based on Field-Effect Tunneling-Transport Transitions.

作者信息

Lim Dong Un, Jo Sae Byeok, Kang Joohoon, Cho Jeong Ho

机构信息

Department of Chemical and Biomolecular Engineering, Yonsei University, Seoul, 03722, Republic of Korea.

Nano Science and Technology Research Institute, Yonsei University, Seoul, 03722, Republic of Korea.

出版信息

Adv Mater. 2021 Jul;33(29):e2101243. doi: 10.1002/adma.202101243. Epub 2021 Jun 1.

Abstract

A monolithic ternary logic transistor based on a vertically stacked double n-type semiconductor heterostructure is presented. Incorporation of the organic heterostructure into the conventional metal-oxide-semiconductor field-effect transistor (MOSFET) architecture induces the generation of stable multiple logic states in the device; these states can be further optimized to be equiprobable and distinctive, which are the most desirable and requisite properties for multivalued logic devices. A systematic investigation reveals that the electrical properties of the device are governed by not only the conventional field-effect charge transport but also the field-effect charge tunneling at the heterointerfaces, and thus, an intermediate state can be finely tuned by independently controlling the transition between the onsets of these two mechanisms. The achieved device performance agrees with the results of a numerical simulation based on a pseudo-metal-insulator-metal model; the obtained findings therefore provide rational criteria for material selection in a simple energetic perspective. The operation of various ternary logic circuits based on the optimized multistate heterojunction transistors, including the NMIN and NMAX gates, is also demonstrated.

摘要

本文提出了一种基于垂直堆叠双n型半导体异质结构的单片三元逻辑晶体管。将有机异质结构引入传统的金属氧化物半导体场效应晶体管(MOSFET)架构中,可在器件中诱导产生稳定的多个逻辑状态;这些状态可进一步优化为等概率且独特的状态,这是多值逻辑器件最理想和必需的特性。系统研究表明,该器件的电学性质不仅受传统场效应电荷传输的支配,还受异质界面处的场效应电荷隧穿的影响,因此,通过独立控制这两种机制起始点之间的转变,可以精细调节中间状态。所实现的器件性能与基于伪金属-绝缘体-金属模型的数值模拟结果相符;因此,从简单的能量角度来看,所获得的结果为材料选择提供了合理的标准。还展示了基于优化的多态异质结晶体管的各种三元逻辑电路的操作,包括NMIN和NMAX门。

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