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基于 FET/CNTFET 的抗辐射加固 SRAM 单元软错误率的设计与分析。

Design and Analysis of Soft Error Rate in FET/CNTFET Based Radiation Hardened SRAM Cell.

机构信息

Department of Electronics and Communication Engineering, College of Engineering Guindy, Anna University, Chennai 600 025, India.

Department of Electronics and Communication Engineering, National Institute of Technology, Delhi 110 040, India.

出版信息

Sensors (Basel). 2021 Dec 22;22(1):33. doi: 10.3390/s22010033.

DOI:10.3390/s22010033
PMID:35009576
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC8747695/
Abstract

Aerospace equipages encounter potential radiation footprints through which soft errors occur in the memories onboard. Hence, robustness against radiation with reliability in memory cells is a crucial factor in aerospace electronic systems. This work proposes a novel Carbon nanotube field-effect transistor (CNTFET) in designing a robust memory cell to overcome these soft errors. Further, a petite driver circuit to test the SRAM cells which serve the purpose of precharge and sense amplifier, and has a reduction in threefold of transistor count is recommended. Additionally, analysis of robustness against radiation in varying memory cells is carried out using standard GPDK 90 nm, GPDK 45 nm, and 14 nm CNTFET. The reliability of memory cells depends on the critical charge of a device, and it is tested by striking an equivalent current charge of the cosmic ray's linear energy transfer (LET) level. Also, the robustness of the memory cell is tested against the variation in process, voltage and temperature. Though CNTFET surges with high power consumption, it exhibits better noise margin and depleted access time. GPDK 45 nm has an average of 40% increase in SNM and 93% reduction of power compared to the 14 nm CNTFET with 96% of surge in write access time. Thus, the conventional MOSFET's 45 nm node outperforms all the configurations in terms of static noise margin, power, and read delay which swaps with increased write access time.

摘要

航空航天设备会遇到潜在的辐射足迹,从而导致机载内存中出现软错误。因此,在航空航天电子系统中,具有可靠性的抗辐射能力和内存单元的鲁棒性是至关重要的因素。本工作提出了一种新型的碳纳米管场效应晶体管(CNTFET),用于设计一种稳健的存储单元,以克服这些软错误。此外,还建议使用一种小型的驱动电路来测试 SRAM 单元,该电路用于预充电和灵敏放大器,并且晶体管数量减少了三倍。此外,使用标准 GPDK 90nm、GPDK 45nm 和 14nm CNTFET 对不同存储单元的抗辐射能力进行了分析。存储单元的可靠性取决于器件的临界电荷,通过施加与宇宙射线线性能量转移(LET)水平相当的等效电流电荷来测试。此外,还测试了存储单元对工艺、电压和温度变化的鲁棒性。尽管 CNTFET 会消耗大量的功率,但它具有更好的噪声裕量和耗尽型存取时间。与具有 96%写入访问时间增加的 14nm CNTFET 相比,GPDK 45nm 的平均 SNM 增加了 40%,功率降低了 93%。因此,与传统的 MOSFET 相比,45nm 节点在静态噪声裕量、功率和读取延迟方面的性能更好,而写入访问时间的增加则会导致性能下降。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/db0b9d9077c5/sensors-22-00033-g014.jpg
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https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/11a56e0ca129/sensors-22-00033-g010.jpg
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https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/db0b9d9077c5/sensors-22-00033-g014.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/5797ece3a925/sensors-22-00033-g001.jpg
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https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/c741d5cf4d24/sensors-22-00033-g005.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/a878b3177536/sensors-22-00033-g006.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/5437c7e8b7b9/sensors-22-00033-g007.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/ff39868df3ee/sensors-22-00033-g008.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/9f608d5e0490/sensors-22-00033-g009.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/11a56e0ca129/sensors-22-00033-g010.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/c5eb2fb31407/sensors-22-00033-g011.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/320d057b0157/sensors-22-00033-g012a.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/b95d38dbafe4/sensors-22-00033-g013a.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/3f18/8747695/db0b9d9077c5/sensors-22-00033-g014.jpg

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本文引用的文献

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