An artificial synaptic transistor using an α-InSe van der Waals ferroelectric channel for pattern recognition.

Despite being widely investigated for their memristive behavior, ferroelectrics are barely studied as channel materials in field-effect transistor (FET) configurations. In this work, we use multilayer α-InSe to realize a ferroelectric channel semiconductor FET, , FeS-FET, whose gate-triggered and polarization-induced resistive switching is then exploited to mimic an artificial synapse. The FeS-FET exhibits key signatures of a synapse such as excitatory and inhibitory postsynaptic current, potentiation/depression, and paired pulsed facilitation. Multiple stable conductance states obtained by tuning the device are then used as synaptic weights to demonstrate pattern recognition by invoking a hidden layer perceptron model. Detailed artificial neural network (ANN) simulations are performed on binary scale MNIST data digits, invoking 784 input (28 × 28 pixels) and 10 output neurons which are used in the training of 42 000 MNIST data digits. By updating the synaptic weights with conductance weight values on 18 000 digits, we achieved a successful recognition rate of 93% on the testing data. Introduction of 0.10 variance of noise pixels results in an accuracy of more than 70% showing the strong fault-tolerant nature of the conductance states. These synaptic functionalities, learning rules, and device to system-level simulation results based on α-InSe could facilitate the development of more complex neuromorphic hardware systems based on FeS-FETs.