Smirnov Nikita S, Krivko Elizaveta A, Solovyova Anastasiya A, Ivanov Anton I, Rodionov Ilya A
FMN Laboratory, Bauman Moscow State Technical University, Moscow, Russia, 105005.
Dukhov Automatics Research Institute, VNIIA, Moscow, Russia, 127030.
Sci Rep. 2024 Mar 27;14(1):7326. doi: 10.1038/s41598-024-57248-y.
Quantum processors using superconducting qubits suffer from dielectric loss leading to noise and dissipation. Qubits are usually designed as large capacitor pads connected to a non-linear Josephson junction (or SQUID) by a superconducting thin metal wiring. Here, we report on finite-element simulation and experimental results confirming that more than 50% of surface loss in transmon qubits can originate from Josephson junctions wiring and can limit qubit relaxation time. We experimentally extracted dielectric loss tangents of qubit elements and showed that dominant surface loss of wiring can occur for real qubits designs. Finally, we experimentally demonstrate up to 20% improvement in qubit quality factor by wiring design optimization.
使用超导量子比特的量子处理器存在介电损耗，导致噪声和耗散。量子比特通常设计为通过超导细金属布线连接到非线性约瑟夫森结（或超导量子干涉装置）的大电容极板。在此，我们报告有限元模拟和实验结果，证实超过50%的跨导量子比特表面损耗可能源于约瑟夫森结布线，并且会限制量子比特弛豫时间。我们通过实验提取了量子比特元件的介电损耗正切，并表明对于实际的量子比特设计，布线的主要表面损耗可能会出现。最后，我们通过布线设计优化，实验证明量子比特品质因数提高了20%。
