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提高超导量子电路约瑟夫森结的重现性:结面积波动。

Improving Josephson junction reproducibility for superconducting quantum circuits: junction area fluctuation.

机构信息

FMN Laboratory, Bauman Moscow State Technical University, Moscow, 105005, Russia.

Dukhov Automatics Research Institute, VNIIA, Moscow, 127030, Russia.

出版信息

Sci Rep. 2023 Apr 25;13(1):6772. doi: 10.1038/s41598-023-34051-9.

DOI:10.1038/s41598-023-34051-9
PMID:37185459
原文链接:https://pmc.ncbi.nlm.nih.gov/articles/PMC10130087/
Abstract

Josephson superconducting qubits and parametric amplifiers are prominent examples of superconducting quantum circuits that have shown rapid progress in recent years. As such devices become more complex, the requirements for reproducibility of their electrical properties across a chip are being tightened. Critical current of the Josephson junction Ic is the essential electrical parameter in a chip. So, its variation is to be minimized. According to the Ambegaokar-Baratoff formula, critical current is related to normal-state resistance, which can be measured at room temperature. In this study, we focused on the dominant source of non-uniformity for the Josephson junction critical current-junction area variation. We optimized Josephson junction fabrication process and demonstrated resistance variation of 9.8-4.4% and 4.8-2.3% across 22 × 22 mm and 5 × 10 mm chip areas, respectively. For a wide range of junction areas from 0.008 to 0.12 μm, we ensure a small linewidth standard deviation of 4 nm measured over 4500 junctions with linear dimensions from 80 to 680 nm. We found that the dominate source of junction area variation limiting [Formula: see text] reproducibility is the imperfection of the evaporation system. The developed fabrication process was tested on superconducting highly coherent transmon qubits (T1 > 100 μs) and a nonlinear asymmetric inductive element parametric amplifier.

摘要

约瑟夫森超导量子比特和参量放大器是超导量子电路的突出例子,近年来取得了快速进展。随着这些器件变得更加复杂,对其在芯片上的电性能重现性的要求也越来越高。约瑟夫森结的临界电流 Ic 是芯片中至关重要的电参数,因此其变化需要最小化。根据 Ambegaokar-Baratoff 公式,临界电流与正常态电阻有关,正常态电阻可以在室温下测量。在这项研究中,我们专注于约瑟夫森结临界电流-结面积变化的非均匀性的主要来源。我们优化了约瑟夫森结的制造工艺,分别在 22×22mm 和 5×10mm 的芯片面积上实现了 9.8-4.4%和 4.8-2.3%的电阻变化。对于从 0.008 到 0.12μm 的广泛结面积范围,我们确保了 4500 个结的线性尺寸从 80 到 680nm 的线宽标准偏差为 4nm。我们发现,限制[公式:见文本]重现性的结面积变化的主要来源是蒸发系统的不完美。开发的制造工艺已在超导高相干超导量子比特(T1>100μs)和非线性非对称感应元件参量放大器上进行了测试。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/6f15/10130087/1f59fa7c0ed6/41598_2023_34051_Fig4_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/6f15/10130087/fa3fb9cff2af/41598_2023_34051_Fig1_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/6f15/10130087/eafb2deec44b/41598_2023_34051_Fig2_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/6f15/10130087/0f49fdeeb9dc/41598_2023_34051_Fig3_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/6f15/10130087/1f59fa7c0ed6/41598_2023_34051_Fig4_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/6f15/10130087/fa3fb9cff2af/41598_2023_34051_Fig1_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/6f15/10130087/eafb2deec44b/41598_2023_34051_Fig2_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/6f15/10130087/0f49fdeeb9dc/41598_2023_34051_Fig3_HTML.jpg
https://cdn.ncbi.nlm.nih.gov/pmc/blobs/6f15/10130087/1f59fa7c0ed6/41598_2023_34051_Fig4_HTML.jpg

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