Lee Sang Hwa, Shin Sung-Ho, Madsen Morten, Takei Kuniharu, Nah Junghyo, Lee Min Hyung
Department of Applied Chemistry, Kyung Hee University, Yongin, Gyeonggi, 17104, Korea.
Department of Electrical Engineering, Chungnam National University, Daejeon, 34134, Korea.
Sci Rep. 2018 Feb 16;8(1):3204. doi: 10.1038/s41598-018-21420-y.
The epitaxial layer transfer process was previously introduced to integrate high-quality and ultrathin III-V compound semiconductor layers on any substrate. However, this technique has limitation for fabrication of sub-micron nanoribbons due to the diffraction limit of photolithography. In order to overcome this limitation and scale down its width to sub-50 nm, we need either a costly short wavelength lithography system or a non-optical patterning method. In this work, high-quality III-V compound semiconductor nanowires were fabricated and integrated onto a Si/SiO substrate by a soft-lithography top-down approach and an epitaxial layer transfer process, using MBE-grown ultrathin InAs as a source wafer. The width of the InAs nanowires was controlled using solvent-assisted nanoscale embossing (SANE), descumming, and etching processes. By optimizing these processes, NWs with a width less than 50 nm were readily obtained. The InAs NWFETs prepared by our method demonstrate peak electron mobility of ~1600 cm/Vs, indicating negligible material degradation during the SANE process.
外延层转移工艺此前已被引入，用于在任何衬底上集成高质量超薄的III-V族化合物半导体层。然而，由于光刻的衍射极限，该技术在制造亚微米纳米带时存在局限性。为了克服这一局限性并将其宽度缩小至50纳米以下，我们要么需要昂贵的短波长光刻系统，要么需要非光学图案化方法。在这项工作中，通过软光刻自上而下的方法和外延层转移工艺，使用分子束外延（MBE）生长的超薄砷化铟作为源晶片，制造了高质量的III-V族化合物半导体纳米线并将其集成到硅/二氧化硅衬底上。通过溶剂辅助纳米压印（SANE）、去胶和蚀刻工艺控制砷化铟纳米线的宽度。通过优化这些工艺，很容易获得宽度小于50纳米的纳米线。我们的方法制备的砷化铟纳米线场效应晶体管（InAs NWFETs）的峰值电子迁移率约为1600厘米/伏秒，表明在SANE工艺过程中材料降解可忽略不计。
