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用于集成纳米器件的钙钛矿纳米晶阵列的现场生长。

On-site growth of perovskite nanocrystal arrays for integrated nanodevices.

机构信息

Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, Cambridge, MA, 02139, USA.

Research Laboratory of Electronics, Massachusetts Institute of Technology, Cambridge, MA, 02139, USA.

出版信息

Nat Commun. 2023 Jul 6;14(1):3883. doi: 10.1038/s41467-023-39488-0.

Abstract

Despite remarkable progress in the development of halide perovskite materials and devices, their integration into nanoscale optoelectronics has been hindered by a lack of control over nanoscale patterning. Owing to their tendency to degrade rapidly, perovskites suffer from chemical incompatibility with conventional lithographic processes. Here, we present an alternative, bottom-up approach for precise and scalable formation of perovskite nanocrystal arrays with deterministic control over size, number, and position. In our approach, localized growth and positioning is guided using topographical templates of controlled surface wettability through which nanoscale forces are engineered to achieve sub-lithographic resolutions. With this technique, we demonstrate deterministic arrays of CsPbBr nanocrystals with tunable dimensions down to <50 nm and positional accuracy <50 nm. Versatile, scalable, and compatible with device integration processes, we then use our technique to demonstrate arrays of nanoscale light-emitting diodes, highlighting the new opportunities that this platform offers for perovskites' integration into on-chip nanodevices.

摘要

尽管卤化物钙钛矿材料和器件的发展取得了显著进展,但由于缺乏对纳米级图案的控制,它们在纳米级光电子学中的集成仍受到阻碍。由于其迅速降解的趋势,钙钛矿与传统光刻工艺的化学兼容性较差。在这里,我们提出了一种替代的自下而上的方法,用于精确和可扩展地形成具有确定尺寸、数量和位置的钙钛矿纳米晶阵列。在我们的方法中,通过控制表面润湿性的形貌模板来引导局部生长和定位,通过纳米尺度力来实现亚光刻分辨率。使用该技术,我们展示了具有可调尺寸(低至<50nm)和位置精度(<50nm)的 CsPbBr 纳米晶的确定性阵列。我们的技术具有多功能性、可扩展性,并且与器件集成过程兼容,然后我们使用该技术展示了纳米级发光二极管阵列,突出了该平台为钙钛矿集成到片上纳米器件提供的新机会。

https://cdn.ncbi.nlm.nih.gov/pmc/blobs/2fbd/10326253/157144e02770/41467_2023_39488_Fig1_HTML.jpg

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