Xu Yongshan, Liu Teng, Liu Kailang, Zhao Yinghe, Liu Lei, Li Penghui, Nie Anmin, Liu Lixin, Yu Jun, Feng Xin, Zhuge Fuwei, Li Huiqiao, Wang Xinran, Zhai Tianyou
State Key Laboratory of Materials Processing and Die and Mould Technology, School of Materials Science and Engineering, Huazhong University of Science and Technology, Wuhan, China.
National Laboratory of Solid State Microstructures, School of Electronic Science and Engineering and Collaborative Innovation Center of Advanced Microstructures, Nanjing University, Nanjing, China.
Nat Mater. 2023 Sep;22(9):1078-1084. doi: 10.1038/s41563-023-01626-w. Epub 2023 Aug 3.
Two-dimensional (2D) semiconductors are promising channel materials for next-generation field-effect transistors (FETs). However, it remains challenging to integrate ultrathin and uniform high-κ dielectrics on 2D semiconductors to fabricate FETs with large gate capacitance. We report a versatile two-step approach to integrating high-quality dielectric film with sub-1 nm equivalent oxide thickness (EOT) on 2D semiconductors. Inorganic molecular crystal SbO is homogeneously deposited on 2D semiconductors as a buffer layer, which forms a high-quality oxide-to-semiconductor interface and offers a highly hydrophilic surface, enabling the integration of high-κ dielectrics via atomic layer deposition. Using this approach, we can fabricate monolayer molybdenum disulfide-based FETs with the thinnest EOT (0.67 nm). The transistors exhibit an on/off ratio of over 10 using an ultra-low operating voltage of 0.4 V, achieving unprecedently high gating efficiency. Our results may pave the way for the application of 2D materials in low-power ultrascaling electronics.
二维(2D)半导体是下一代场效应晶体管(FET)很有前景的沟道材料。然而,在二维半导体上集成超薄且均匀的高κ电介质以制造具有大栅极电容的FET仍然具有挑战性。我们报告了一种通用的两步法,用于在二维半导体上集成等效氧化物厚度(EOT)小于1nm的高质量介电薄膜。无机分子晶体SbO作为缓冲层均匀沉积在二维半导体上,它形成了高质量的氧化物 - 半导体界面并提供高度亲水的表面,从而能够通过原子层沉积集成高κ电介质。使用这种方法,我们可以制造出具有最薄EOT(0.67nm)的基于单层二硫化钼的FET。这些晶体管在0.4V的超低工作电压下具有超过10的开/关比,实现了前所未有的高栅控效率。我们的结果可能为二维材料在低功耗超大规模电子学中的应用铺平道路。